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Message-Id: <20251220100010.26643-3-amadeus@jmu.edu.cn>
Date: Sat, 20 Dec 2025 18:00:10 +0800
From: Chukun Pan <amadeus@....edu.cn>
To: Heiko Stuebner <heiko@...ech.de>
Cc: Rob Herring <robh@...nel.org>,
Chukun Pan <amadeus@....edu.cn>,
Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: [PATCH 3/3] arm64: dts: rockchip: enable saradc for ArmSoM Sige5
Add ADC support to ArmSoM Sige5 board.
Signed-off-by: Chukun Pan <amadeus@....edu.cn>
---
arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
index a0d8f52a706f..d372ba252af8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
@@ -897,6 +897,11 @@ &sai6 {
status = "okay";
};
+&saradc {
+ vref-supply = <&vcca_1v8_s0>;
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
full-pwr-cycle-in-suspend;
--
2.25.1
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