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Message-ID: <202512202142.StvDXvbg-lkp@intel.com>
Date: Sat, 20 Dec 2025 22:34:48 +0800
From: kernel test robot <lkp@...el.com>
To: Benoît Monin <benoit.monin@...tlin.com>,
Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>,
Gregory CLEMENT <gregory.clement@...tlin.com>,
Théo Lebrun <theo.lebrun@...tlin.com>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Linus Walleij <linusw@...nel.org>
Cc: oe-kbuild-all@...ts.linux.dev,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Tawfik Bayouk <tawfik.bayouk@...ileye.com>,
linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-gpio@...r.kernel.org,
Benoît Monin <benoit.monin@...tlin.com>
Subject: Re: [PATCH 05/13] pinctrl: eyeq5: Use match data
Hi Benoît,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 8f0b4cce4481fb22653697cced8d0d04027cb1e8]
url: https://github.com/intel-lab-lkp/linux/commits/Beno-t-Monin/dt-bindings-mips-Add-Mobileye-EyeQ6Lplus-SoC/20251217-214926
base: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
patch link: https://lore.kernel.org/r/20251217-eyeq6lplus-v1-5-e9cdbd3af4c2%40bootlin.com
patch subject: [PATCH 05/13] pinctrl: eyeq5: Use match data
config: parisc-allyesconfig (https://download.01.org/0day-ci/archive/20251220/202512202142.StvDXvbg-lkp@intel.com/config)
compiler: hppa-linux-gcc (GCC) 15.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251220/202512202142.StvDXvbg-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512202142.StvDXvbg-lkp@intel.com/
All warnings (new ones prefixed by >>):
drivers/pinctrl/pinctrl-eyeq5.c: In function 'eq5p_pinconf_set':
>> drivers/pinctrl/pinctrl-eyeq5.c:533:13: warning: 'offset' is used uninitialized [-Wuninitialized]
533 | u32 val = BIT(offset);
| ^~~
drivers/pinctrl/pinctrl-eyeq5.c:532:22: note: 'offset' was declared here
532 | unsigned int offset;
| ^~~~~~
vim +/offset +533 drivers/pinctrl/pinctrl-eyeq5.c
41795aa1f56a6e Théo Lebrun 2024-07-30 524
41795aa1f56a6e Théo Lebrun 2024-07-30 525 static int eq5p_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
41795aa1f56a6e Théo Lebrun 2024-07-30 526 unsigned long *configs, unsigned int num_configs)
41795aa1f56a6e Théo Lebrun 2024-07-30 527 {
41795aa1f56a6e Théo Lebrun 2024-07-30 528 struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
41795aa1f56a6e Théo Lebrun 2024-07-30 529 const char *pin_name = pctldev->desc->pins[pin].name;
41795aa1f56a6e Théo Lebrun 2024-07-30 530 struct device *dev = pctldev->dev;
e3ba56038b97ee Benoît Monin 2025-12-17 531 const struct eq5p_bank *bank;
e3ba56038b97ee Benoît Monin 2025-12-17 532 unsigned int offset;
41795aa1f56a6e Théo Lebrun 2024-07-30 @533 u32 val = BIT(offset);
41795aa1f56a6e Théo Lebrun 2024-07-30 534 unsigned int i;
e3ba56038b97ee Benoît Monin 2025-12-17 535 int ret;
e3ba56038b97ee Benoît Monin 2025-12-17 536
e3ba56038b97ee Benoît Monin 2025-12-17 537 ret = eq5p_pin_to_bank_offset(pctrl, pin, &bank, &offset);
e3ba56038b97ee Benoît Monin 2025-12-17 538 if (ret)
e3ba56038b97ee Benoît Monin 2025-12-17 539 return ret;
41795aa1f56a6e Théo Lebrun 2024-07-30 540
41795aa1f56a6e Théo Lebrun 2024-07-30 541 for (i = 0; i < num_configs; i++) {
41795aa1f56a6e Théo Lebrun 2024-07-30 542 enum pin_config_param param = pinconf_to_config_param(configs[i]);
41795aa1f56a6e Théo Lebrun 2024-07-30 543 u32 arg = pinconf_to_config_argument(configs[i]);
41795aa1f56a6e Théo Lebrun 2024-07-30 544
41795aa1f56a6e Théo Lebrun 2024-07-30 545 switch (param) {
41795aa1f56a6e Théo Lebrun 2024-07-30 546 case PIN_CONFIG_BIAS_DISABLE:
41795aa1f56a6e Théo Lebrun 2024-07-30 547 dev_dbg(dev, "pin=%s bias_disable\n", pin_name);
41795aa1f56a6e Théo Lebrun 2024-07-30 548
41795aa1f56a6e Théo Lebrun 2024-07-30 549 eq5p_update_bits(pctrl, bank, EQ5P_PD, val, 0);
41795aa1f56a6e Théo Lebrun 2024-07-30 550 eq5p_update_bits(pctrl, bank, EQ5P_PU, val, 0);
41795aa1f56a6e Théo Lebrun 2024-07-30 551 break;
41795aa1f56a6e Théo Lebrun 2024-07-30 552
41795aa1f56a6e Théo Lebrun 2024-07-30 553 case PIN_CONFIG_BIAS_PULL_DOWN:
41795aa1f56a6e Théo Lebrun 2024-07-30 554 dev_dbg(dev, "pin=%s bias_pull_down arg=%u\n",
41795aa1f56a6e Théo Lebrun 2024-07-30 555 pin_name, arg);
41795aa1f56a6e Théo Lebrun 2024-07-30 556
41795aa1f56a6e Théo Lebrun 2024-07-30 557 if (arg == 0) /* cannot connect to GND */
41795aa1f56a6e Théo Lebrun 2024-07-30 558 return -ENOTSUPP;
41795aa1f56a6e Théo Lebrun 2024-07-30 559
41795aa1f56a6e Théo Lebrun 2024-07-30 560 eq5p_update_bits(pctrl, bank, EQ5P_PD, val, val);
41795aa1f56a6e Théo Lebrun 2024-07-30 561 eq5p_update_bits(pctrl, bank, EQ5P_PU, val, 0);
41795aa1f56a6e Théo Lebrun 2024-07-30 562 break;
41795aa1f56a6e Théo Lebrun 2024-07-30 563
41795aa1f56a6e Théo Lebrun 2024-07-30 564 case PIN_CONFIG_BIAS_PULL_UP:
41795aa1f56a6e Théo Lebrun 2024-07-30 565 dev_dbg(dev, "pin=%s bias_pull_up arg=%u\n",
41795aa1f56a6e Théo Lebrun 2024-07-30 566 pin_name, arg);
41795aa1f56a6e Théo Lebrun 2024-07-30 567
41795aa1f56a6e Théo Lebrun 2024-07-30 568 if (arg == 0) /* cannot connect to VDD */
41795aa1f56a6e Théo Lebrun 2024-07-30 569 return -ENOTSUPP;
41795aa1f56a6e Théo Lebrun 2024-07-30 570
41795aa1f56a6e Théo Lebrun 2024-07-30 571 eq5p_update_bits(pctrl, bank, EQ5P_PD, val, 0);
41795aa1f56a6e Théo Lebrun 2024-07-30 572 eq5p_update_bits(pctrl, bank, EQ5P_PU, val, val);
41795aa1f56a6e Théo Lebrun 2024-07-30 573 break;
41795aa1f56a6e Théo Lebrun 2024-07-30 574
41795aa1f56a6e Théo Lebrun 2024-07-30 575 case PIN_CONFIG_DRIVE_STRENGTH:
41795aa1f56a6e Théo Lebrun 2024-07-30 576 dev_dbg(dev, "pin=%s drive_strength arg=%u\n",
41795aa1f56a6e Théo Lebrun 2024-07-30 577 pin_name, arg);
41795aa1f56a6e Théo Lebrun 2024-07-30 578
41795aa1f56a6e Théo Lebrun 2024-07-30 579 eq5p_pinconf_set_drive_strength(pctldev, pin, arg);
41795aa1f56a6e Théo Lebrun 2024-07-30 580 break;
41795aa1f56a6e Théo Lebrun 2024-07-30 581
41795aa1f56a6e Théo Lebrun 2024-07-30 582 default:
41795aa1f56a6e Théo Lebrun 2024-07-30 583 dev_err(dev, "Unsupported pinconf %u\n", param);
41795aa1f56a6e Théo Lebrun 2024-07-30 584 return -ENOTSUPP;
41795aa1f56a6e Théo Lebrun 2024-07-30 585 }
41795aa1f56a6e Théo Lebrun 2024-07-30 586 }
41795aa1f56a6e Théo Lebrun 2024-07-30 587
41795aa1f56a6e Théo Lebrun 2024-07-30 588 return 0;
41795aa1f56a6e Théo Lebrun 2024-07-30 589 }
41795aa1f56a6e Théo Lebrun 2024-07-30 590
--
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