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Message-ID: <176619589672.357311.747766699419646929.robh@kernel.org>
Date: Fri, 19 Dec 2025 19:58:17 -0600
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Cc: Chen-Yu Tsai <wenst@...omium.org>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
Ulf Hansson <ulf.hansson@...aro.org>,
David Airlie <airlied@...il.com>, linux-kernel@...r.kernel.org,
kernel@...labora.com, Liviu Dudau <liviu.dudau@....com>,
dri-devel@...ts.freedesktop.org, linux-mediatek@...ts.infradead.org,
Conor Dooley <conor+dt@...nel.org>,
Steven Price <steven.price@....com>, Chia-I Wu <olvaffe@...il.com>,
devicetree@...r.kernel.org, linux-pm@...r.kernel.org,
Matthias Brugger <matthias.bgg@...il.com>,
Boris Brezillon <boris.brezillon@...labora.com>,
Simona Vetter <simona@...ll.ch>,
Thomas Zimmermann <tzimmermann@...e.de>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>
Subject: Re: [PATCH 1/4] dt-bindings: gpu: mali-valhall-csf: Add
shader-present nvmem cell
On Wed, 17 Dec 2025 18:03:27 +0100, Nicolas Frattaroli wrote:
> On the MediaTek MT8196 SoC, the bitmask for which shader cores are
> present and functional is not the one in the Mali GPU's registers, but
> in an external efuse.
>
> Add the nvmem cell properties to describe such a setup, and make them
> required on MT8196.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
> ---
> .../devicetree/bindings/gpu/arm,mali-valhall-csf.yaml | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
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