linux-kernel - Re: [PATCH 7/8] riscv: dts: spacemit: add initial device tree of SpacemiT K3 SoC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <aUYOgl8ffcJ0Xfwg@pie>
Date: Sat, 20 Dec 2025 02:48:34 +0000
From: Yao Zi <me@...ao.cc>
To: Guodong Xu <guodong@...cstar.com>, Conor Dooley <conor@...nel.org>
Cc: Heinrich Schuchardt <heinrich.schuchardt@...onical.com>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...ive.com>,
	Kevin Meng Zhang <zhangmeng.kevin@...ux.spacemit.com>,
	devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org, spacemit@...ts.linux.dev,
	linux-serial@...r.kernel.org, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Paul Walmsley <pjw@...nel.org>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
	Yixun Lan <dlan@...too.org>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Samuel Holland <samuel.holland@...ive.com>,
	Anup Patel <anup@...infault.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jirislaby@...nel.org>, Lubomir Rintel <lkundrak@...sk>,
	Yangyu Chen <cyy@...self.name>
Subject: Re: [PATCH 7/8] riscv: dts: spacemit: add initial device tree of
 SpacemiT K3 SoC

On Fri, Dec 19, 2025 at 10:03:24AM +0800, Guodong Xu wrote:
> Hi, Conor and Heinrich
> 
> On Thu, Dec 18, 2025 at 8:56 AM Conor Dooley <conor@...nel.org> wrote:
> >
> > On Wed, Dec 17, 2025 at 09:07:14AM +0100, Heinrich Schuchardt wrote:
> > > On 12/17/25 08:11, Guodong Xu wrote:
> >
> > > > Specifically, I must adhere to
> > > > Documentation/devicetree/bindings/riscv/extensions.yaml (and cpus.yaml for
> > > > properties like 'riscv,sv39' which stands for the extension Sv39). If I
> > > > add extension strings that are not yet defined in these schemas, such as
> > > > supm, running 'make dtbs_check W=3' fails with: 'supm' is not one of
> > > > ['i', 'm', 'a', ...], followed by "Unevaluated properties are not allowed."
> > >
> > > If Documentation/devicetree/bindings/riscv/extensions.yaml is incomplete
> > > with respect to ratified extensions, I guess the right approach is to amend
> > > it and not to curtail the CPU description.
> >
> > Absolutely. If the cpu supports something that is not documented, then
> > please document it rather than omit from the devicetree.
> 

...

> Strictly describing the SpacemiT X100/K3 (or any core) as RVA23-compliant
> requires adding these extensions that are currently missing from
> the kernel bindings:
> RVA23U64: Ziccif, Ziccamoa, Zicclsm, Za64rs
> RVA23S64: Ss1p13, Ssccptr, Sstvecd, Sstvala, Sscounterenw, Ssu64xl,
>           Sha, Shcounterenw, Shvstvala, Shtvala, Shvstvecd, Shvsatpa, Shgatpa
> Plus 'Supm', 'Zic64b', 'Ssstateen', 'B' where the kernel supports them but

Please note B is just the abbreviation of "zba", "zbb", and "zbs", all
of them have been documented in extensions.yaml.

> they are not literally documented in yaml.
> 
> Is this approach acceptable to you? If so, I will proceed with submitting them.
> 
> Thank you very much.
> 
> Best regards,
> Guodong Xu
> 

Regards,
Yao Zi