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Message-ID: <20251221155611.6af6ce1b@jic23-huawei>
Date: Sun, 21 Dec 2025 15:56:11 +0000
From: Jonathan Cameron <jic23@...nel.org>
To: 455.rodrigo.alencar@...il.com
Cc: Krzysztof Kozlowski <krzk@...nel.org>, Rodrigo Alencar
<rodrigo.alencar@...log.com>, linux-kernel@...r.kernel.org,
linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
linux-doc@...r.kernel.org, David Lechner <dlechner@...libre.com>, Andy
Shevchenko <andy@...nel.org>, Lars-Peter Clausen <lars@...afoo.de>, Michael
Hennerich <Michael.Hennerich@...log.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Jonathan Corbet <corbet@....net>
Subject: Re: [PATCH v2 1/6] dt-bindings: iio: frequency: add adf41513
On Sat, 20 Dec 2025 18:05:34 +0000
455.rodrigo.alencar@...il.com wrote:
> Hi Krzystof,
>
> thanks for taking a look into this again. It was my first patch it didn't want
> to draw more attention or discussion to the V1 patch as it was declared not ready
> at its very first review.
>
> On 25/12/20 10:21AM, Krzysztof Kozlowski wrote:
> > On Fri, Dec 19, 2025 at 12:34:48PM +0000, Rodrigo Alencar wrote:
> > > dt-bindings for ADF41513, an ultralow noise PLL frequency synthesizer that
> > > can be used to implement local oscillators (LOs) as high as 26.5 GHz.
> > > Most properties refer to existing PLL driver properties (e.g. ADF4350).
> >
> > What is "existing PLL driver"? I know about motor drivers, but can you
> > drive PLL?
> >
> > And how is ADF4350 related to this binding. I do not see ADF4350
> > compatible here at all. Describe hardware, a real one.
>
> ADF4350 is an older one, and its bindings can be found at:
> Documentation/devicetree/bindings/iio/frequency/adi,adf4350.yaml
> It is a similar part, but yet very different.
>
> >
> > Nothing improved.
> >
> > You ignored comments, did not bother to respond to them and then sent
> > the same.
>
> Sorry for not responding on the V1 thread, but the previous patch had to be reviewed internally
> first. It is not true that nothing is improved, in fact, it has changed a lot, here are some notes:
> * adi,power-up-frequency is not carrying the -hz postfix because it forces to be a uint32 by
> the dt-bindings check. For that variable it needs to be uint64 as the part supports up to 26.5 GHz > 2^32
What granularity is necessary? E.g. Could -mhz work here? It's already defined in dts schema for MHz.
> * The properties related to the reference input signal path: reference-div-factor, reference-doubler-enable
> reference-div2-enable are declared here because they are constraints for the PFD frequency definition,
> which is the frequency that the output signal is updated, important for the loop-filter and VCO design.
> * added support for all different power supply regulators.
> * adi,lock-detect-precision and adi,lock-detect-bias-microamp: removed, now set
> with adf41513_set_ld_window() following datasheet recommendation
> * adi,fast-lock-enable: removed, faster lock detect clock is set depending on the lock-detect-count value
> * adi,phase-resync-enable, adi,12bit-clk-divider and adi,12bit-clk2-divider: removed, now set with
> adf41513_set_phase_resync(), based on the t_sync (from the datasheet: Phase Resync section)
> value determined by adi,phase-resync-period-ns, which is also bound to the loop filter design.
>
> kind regards,
>
> Rodrigo Alencar
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