linux-kernel - Re: [PATCH v3 1/6] clk: correct clk_div

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Message-ID: <aUmSi3mSDjx7cmpn@redhat.com>
Date: Mon, 22 Dec 2025 13:48:43 -0500
From: Brian Masney <bmasney@...hat.com>
To: Junhui Liu <junhui.liu@...moral.tech>
Cc: Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Paul Walmsley <pjw@...nel.org>, Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
	linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
	Troy Mitchell <troy.mitchell@...ux.spacemit.com>
Subject: Re: [PATCH v3 1/6] clk: correct clk_div_mask() return value for
 width == 32

On Tue, Dec 16, 2025 at 11:39:41AM +0800, Junhui Liu wrote:
> The macro clk_div_mask() currently wraps to zero when width is 32 due to
> 1 << 32 being undefined behavior. This leads to incorrect mask generation
> and prevents correct retrieval of register field values for 32-bit-wide
> dividers.
> 
> Although it is unlikely to exhaust all U32_MAX div, some clock IPs may rely
> on a 32-bit val entry in their div_table to match a div, so providing a
> full 32-bit mask is necessary.
> 
> Fix this by casting 1 to long, ensuring proper behavior for valid widths up
> to 32.
> 
> Reviewed-by: Troy Mitchell <troy.mitchell@...ux.spacemit.com>
> Signed-off-by: Junhui Liu <junhui.liu@...moral.tech>

Reviewed-by: Brian Masney <bmasney@...hat.com>