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Message-Id: <20251222-add_sysfs_nodes_to_configure_tpda-v6-3-b27143d45c86@oss.qualcomm.com>
Date: Mon, 22 Dec 2025 14:02:23 +0800
From: Jie Gan <jie.gan@....qualcomm.com>
To: Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Tingwei Zhang <tingwei.zhang@....qualcomm.com>
Cc: coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Jie Gan <jie.gan@....qualcomm.com>,
Tao Zhang <tao.zhang@....qualcomm.com>
Subject: [PATCH v6 3/4] coresight: tpda: add logic to configure TPDA_SYNCR
register
From: Tao Zhang <tao.zhang@....qualcomm.com>
The TPDA_SYNC counter tracks the number of bytes transferred from the
aggregator. When this count reaches the value programmed in the
TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace
tools to accurately parse each valid packet.
Signed-off-by: Tao Zhang <tao.zhang@....qualcomm.com>
Reviewed-by: James Clark <james.clark@...aro.org>
Co-developed-by: Jie Gan <jie.gan@....qualcomm.com>
Signed-off-by: Jie Gan <jie.gan@....qualcomm.com>
---
.../ABI/testing/sysfs-bus-coresight-devices-tpda | 10 +++++
drivers/hwtracing/coresight/coresight-tpda.c | 46 ++++++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpda.h | 8 ++++
3 files changed, 64 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
index c8bc7b19ab25..d359d90dca72 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
@@ -41,3 +41,13 @@ Contact: Jinlong Mao <jinlong.mao@....qualcomm.com>, Tao Zhang <tao.zhang@....qu
Description:
(RW) Set global (all ports) flush request bit. The bit remains set until a
global flush request sequence completes.
+
+What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode
+Date: December 2025
+KernelVersion: 6.19
+Contact: Jinlong Mao <jinlong.mao@....qualcomm.com>, Tao Zhang <tao.zhang@....qualcomm.com>, Jie Gan <jie.gan@....qualcomm.com>
+Description:
+ (RW) Set mode the of the syncr counter.
+ mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests
+ mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K
+ data by writing a value 13 to the COUNT[11:7] field.
diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
index d24a9098f1b1..7baa8a0965d3 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.c
+++ b/drivers/hwtracing/coresight/coresight-tpda.c
@@ -163,6 +163,15 @@ static void tpda_enable_pre_port(struct tpda_drvdata *drvdata)
*/
if (drvdata->trig_flag_ts)
writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR);
+
+ /* Initialize with a value of 0 */
+ val = 0;
+ if (drvdata->syncr_mode)
+ val |= TPDA_SYNCR_MODE_CTRL_MASK;
+
+ /* Program the counter to its MAX value by default */
+ val |= TPDA_SYNCR_COUNTER_MASK;
+ writel_relaxed(val, drvdata->base + TPDA_SYNCR);
}
static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
@@ -385,8 +394,45 @@ static ssize_t global_flush_req_store(struct device *dev,
}
static DEVICE_ATTR_RW(global_flush_req);
+static ssize_t syncr_mode_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val, syncr_val;
+
+ if (!drvdata->csdev->refcnt)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR);
+ val = FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val);
+
+ return sysfs_emit(buf, "%lu\n", val);
+}
+
+static ssize_t syncr_mode_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (kstrtoul(buf, 0, &val))
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ /* set the mode when first enabling the device */
+ drvdata->syncr_mode = !!val;
+
+ return size;
+}
+static DEVICE_ATTR_RW(syncr_mode);
+
static struct attribute *tpda_attrs[] = {
&dev_attr_global_flush_req.attr,
+ &dev_attr_syncr_mode.attr,
tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
index 1cc9253293ec..1d2de50bb9f9 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.h
+++ b/drivers/hwtracing/coresight/coresight-tpda.h
@@ -9,6 +9,7 @@
#define TPDA_CR (0x000)
#define TPDA_Pn_CR(n) (0x004 + (n * 4))
#define TPDA_FPID_CR (0x084)
+#define TPDA_SYNCR (0x08C)
/* Cross trigger global (all ports) flush request bit */
#define TPDA_CR_FLREQ BIT(0)
@@ -36,6 +37,11 @@
/* Aggregator port DSB data set element size bit */
#define TPDA_Pn_CR_DSBSIZE BIT(8)
+/* TPDA_SYNCR counter mask */
+#define TPDA_SYNCR_COUNTER_MASK GENMASK(11, 0)
+/* TPDA_SYNCR mode control bit */
+#define TPDA_SYNCR_MODE_CTRL_MASK GENMASK(12, 12)
+
#define TPDA_MAX_INPORTS 32
/**
@@ -52,6 +58,7 @@
* @trig_freq: Enable/disable cross trigger FREQ packet request interface.
* @freq_ts: Enable/disable the timestamp for all FREQ packets.
* @cmbchan_mode: Configure the CMB/MCMB channel mode.
+ * @syncr_mode: Configure the mode for counting packets.
*/
struct tpda_drvdata {
void __iomem *base;
@@ -66,6 +73,7 @@ struct tpda_drvdata {
bool trig_freq;
bool freq_ts;
bool cmbchan_mode;
+ bool syncr_mode;
};
/* Enumerate members of global control register(cr) */
--
2.34.1
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