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Message-ID: <c0eeae31-6951-47ca-8651-868db18d349e@kernel.org>
Date: Mon, 22 Dec 2025 12:50:10 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Peter Griffin <peter.griffin@...aro.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>,
 André Draszik <andre.draszik@...aro.org>,
 Tudor Ambarus <tudor.ambarus@...aro.org>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Sam Protsenko <semen.protsenko@...aro.org>,
 Sylwester Nawrocki <s.nawrocki@...sung.com>,
 Chanwoo Choi <cw00.choi@...sung.com>
Cc: Will McVicker <willmcvicker@...gle.com>, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
 kernel-team@...roid.com
Subject: Re: [PATCH v7 0/4] Implement hardware automatic clock gating (HWACG)
 for gs101

On 22/12/2025 11:22, Peter Griffin wrote:
> Hi folks,
> 
> This series addresses an issue with Samsung Exynos based upstream clock driver
> whereby the upstream clock driver sets all the clock gates into "manual mode"
> (which uses a bit that is documented as reserved in the gate registers).
> 

Applied. There were several checkpatch notices/less important warnings
of which most were result of existing code but few were introduced.
Please be sure you do not introduce new warnings NEXT TIME.

Also, DTS cannot be in the middle of the patchset. It's almost always
wrong, like in this case as well. This was raised, also by me, multiple
times on the lists and it is explicitly documented in submitting
patches. Putting it in the middle suggests you try to fix up broken
unbisectable things by reordering patches, but you cannot. Things will
be broken anyway, because DTS ALWAYS goes separate (also documented in
maintainers profile).

Best regards,
Krzysztof

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