linux-kernel - Re: [PATCH v2] arm64: dts: rockchip: enable both 2.5GbE ports on Rock 5T

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Message-ID: <5037086.R56niFO833@phil>
Date: Mon, 22 Dec 2025 13:18:15 +0100
From: Heiko Stuebner <heiko@...ech.de>
To: linux-rockchip@...ts.infradead.org,
 Martin Holovský (Probably Nothing s.r.o.)
 <mh@...bably.group>, Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
 linux-kernel@...r.kernel.org
Subject:
 Re: [PATCH v2] arm64: dts: rockchip: enable both 2.5GbE ports on Rock 5T

Am Freitag, 19. Dezember 2025, 14:06:12 Mitteleuropäische Normalzeit schrieb Nicolas Frattaroli:
> On Thursday, 18 December 2025 07:27:06 Central European Standard Time Martin Holovský (Probably Nothing s.r.o.) wrote:
> > The Radxa Rock 5T board features two RTL8125B 2.5GbE Ethernet controllers
> > connected via PCIe lanes pcie2x1l0 (fe170000) and pcie2x1l2 (fe190000).
> > Currently only one interface is functional because the PCIe controller
> > nodes lack the necessary reset GPIO configuration.
> > 
> > Without the reset-gpios property, the RTL8125B PHYs remain in reset state
> > and are not enumerated by the PCIe bus. This results in only one Ethernet
> > interface being detected, or none at all depending on U-Boot initialization.
> > 
> > This patch adds the missing configuration for both PCIe controllers:
> > - Enables both pcie2x1l0 and pcie2x1l2 nodes (status = "okay")
> > - Configures reset GPIOs (GPIO4_PA5 and GPIO3_PB0 respectively)
> > - Adds corresponding pinctrl definitions
> > 
> > With this change, both 2.5GbE interfaces are properly detected and
> > functional on the Rock 5T.
> > 
> > Tested on Radxa Rock 5T v1.2 running Linux 6.12.
> > 
> > Signed-off-by: Martin Holovsky <mh@...bably.group>
> > ---
> > Changes in v2:
> > - Sorted pcie nodes alphanumerically
> > - Sorted pinctrl nodes alphanumerically
> > - Added Signed-off-by line
> > 
> >  .../boot/dts/rockchip/rk3588-rock-5t.dts      | 28 +++++++++++++++++++
> >  1 file changed, 28 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
> > index 0dd90c744380..aeb8e0d42f09 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
> > +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
> > @@ -68,10 +68,24 @@ &pcie2x1l1 {
> >  	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
> >  	status = "okay";
> >  };
> >  
> > +&pcie2x1l0 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pcie2_0_rst>;
> > +	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
> > +	status = "okay";
> > +};
> > +
> > +&pcie2x1l2 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pcie2_2_rst>;
> > +	reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
> > +	status = "okay";
> > +};
> > +
> >  &pcie30phy {
> >  	data-lanes = <1 1 2 2>;
> >  };
> > @@ -101,6 +115,14 @@ pcie2 {
> > +		pcie2_0_rst: pcie2-0-rst {
> > +			rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
> > +		};
> > +
> >  		pcie2_1_rst: pcie2-1-rst {
> >  			rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
> >  		};
> > +
> > +		pcie2_2_rst: pcie2-2-rst {
> > +			rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
> > +		};
> > +
> >  		pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
> >  			rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
> >  		};
> > 
> 
> This stuff is already in rk3588-rock-5b-5bp-5t.dtsi. Ergo, this patch
> does nothing at all. What are you actually trying to solve?
> 
> Heiko, please don't apply this.

Thanks for the heads-up, both to you and Naoki :-)

Heiko