[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20251223162833.138286-4-francesco@dolcini.it>
Date: Tue, 23 Dec 2025 17:28:29 +0100
From: Francesco Dolcini <francesco@...cini.it>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>
Cc: Francesco Dolcini <francesco.dolcini@...adex.com>,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v1 3/4] arm64: dts: freescale: Add NXP i.MX8QP SoC dtsi
From: Francesco Dolcini <francesco.dolcini@...adex.com>
Add support for NXP i.MX8QP SoC, this is pin to pin compatible variant
of the i.MX8QM, with a slower GPU and one Cortex A72 core instead of
two.
Link: https://www.nxp.com/products/i.MX8
Signed-off-by: Francesco Dolcini <francesco.dolcini@...adex.com>
---
arch/arm64/boot/dts/freescale/imx8qp.dtsi | 24 +++++++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8qp.dtsi
diff --git a/arch/arm64/boot/dts/freescale/imx8qp.dtsi b/arch/arm64/boot/dts/freescale/imx8qp.dtsi
new file mode 100644
index 000000000000..26af9c5a51c5
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qp.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+
+#include "imx8qm.dtsi"
+
+/delete-node/ &A72_1;
+
+&cluster1 {
+ /delete-node/ core1;
+};
+
+&gpu_3d0 {
+ assigned-clock-rates = <625000000>, <625000000>;
+};
+
+&thermal_zones {
+ cpu1-thermal {
+ cooling-maps {
+ map0 {
+ cooling-device =
+ <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+};
--
2.47.3
Powered by blists - more mailing lists