linux-kernel - Re: [PATCH 3/7] perf/x86/intel/uncore: Add CBB PMON support for Diamond Rapids

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Message-ID: <6aa56e97-4fff-4a1d-85de-eb1050ed904f@linux.intel.com>
Date: Tue, 23 Dec 2025 11:38:15 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Zide Chen <zide.chen@...el.com>, Peter Zijlstra <peterz@...radead.org>,
 Ingo Molnar <mingo@...hat.com>, Arnaldo Carvalho de Melo <acme@...nel.org>,
 Namhyung Kim <namhyung@...nel.org>, Ian Rogers <irogers@...gle.com>,
 Adrian Hunter <adrian.hunter@...el.com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Andi Kleen <ak@...ux.intel.com>, Eranian Stephane <eranian@...gle.com>
Cc: linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
 Xudong Hao <xudong.hao@...el.com>, Falcon Thomas <thomas.falcon@...el.com>
Subject: Re: [PATCH 3/7] perf/x86/intel/uncore: Add CBB PMON support for
 Diamond Rapids


On 12/13/2025 5:00 AM, Zide Chen wrote:
> On DMR, PMON units inside the Core Building Block (CBB) are enumerated
> separately from those in the Integrated Memory and I/O Hub (IMH).
>
> A new per-CBB MSR (0x710) is introduced for discovery table enumeration.
>
> For counter control registers, the tid_en bit (bit 16) exists on CBO,
> SBO, and Santa, but it is not used by any events.  Mark this bit as
> reserved.
>
> Similarly, disallow extended umask (bits 32–63) on Santa and sNCU.
>
> Additionally, ignore broken PMON units for MSE and SB2UCIE.
>
> Signed-off-by: Zide Chen <zide.chen@...el.com>
> ---
>  arch/x86/events/intel/uncore.c           |  1 +
>  arch/x86/events/intel/uncore_discovery.h |  2 +
>  arch/x86/events/intel/uncore_snbep.c     | 48 ++++++++++++++++++++++--
>  3 files changed, 48 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
> index 7ab02638e3f1..88c32e528add 100644
> --- a/arch/x86/events/intel/uncore.c
> +++ b/arch/x86/events/intel/uncore.c
> @@ -1847,6 +1847,7 @@ static const struct intel_uncore_init_fun dmr_uncore_init __initconst = {
>  	.pci_init = dmr_uncore_pci_init,
>  	.mmio_init = dmr_uncore_mmio_init,
>  	.discovery_pci = DMR_UNCORE_DISCOVERY_TABLE_DEVICE,
> +	.discovery_msr = DMR_UNCORE_DISCOVERY_MSR,
>  	.uncore_units_ignore = dmr_uncore_units_ignore,
>  };
>  
> diff --git a/arch/x86/events/intel/uncore_discovery.h b/arch/x86/events/intel/uncore_discovery.h
> index 786670276b5f..a558c31ff2b1 100644
> --- a/arch/x86/events/intel/uncore_discovery.h
> +++ b/arch/x86/events/intel/uncore_discovery.h
> @@ -2,6 +2,8 @@
>  
>  /* Store the full address of the global discovery table */
>  #define UNCORE_DISCOVERY_MSR			0x201e
> +/* Alternative MSR that is used by server CPUs like DMR */
> +#define DMR_UNCORE_DISCOVERY_MSR		0x710
>  
>  /* Generic device ID of a discovery table device */
>  #define UNCORE_DISCOVERY_TABLE_DEVICE		0x09a7
> diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
> index dee94bbdddcf..bd1569876640 100644
> --- a/arch/x86/events/intel/uncore_snbep.c
> +++ b/arch/x86/events/intel/uncore_snbep.c
> @@ -6806,6 +6806,28 @@ static struct intel_uncore_type dmr_uncore_hamvf = {
>  	.attr_update		= uncore_alias_groups,
>  };
>  
> +static struct intel_uncore_type dmr_uncore_cbo = {
> +	.name			= "cbo",
> +	.event_mask_ext		= DMR_HAMVF_EVENT_MASK_EXT,
> +	.format_group		= &dmr_sca_uncore_format_group,
> +	.attr_update		= uncore_alias_groups,
> +};
> +
> +static struct intel_uncore_type dmr_uncore_santa = {
> +	.name			= "santa",
> +	.attr_update		= uncore_alias_groups,
> +};
> +
> +static struct intel_uncore_type dmr_uncore_cncu = {
> +	.name			= "cncu",
> +	.attr_update		= uncore_alias_groups,
> +};
> +
> +static struct intel_uncore_type dmr_uncore_sncu = {
> +	.name			= "sncu",
> +	.attr_update		= uncore_alias_groups,
> +};
> +
>  static struct intel_uncore_type dmr_uncore_ula = {
>  	.name			= "ula",
>  	.event_mask_ext		= DMR_HAMVF_EVENT_MASK_EXT,
> @@ -6813,6 +6835,20 @@ static struct intel_uncore_type dmr_uncore_ula = {
>  	.attr_update		= uncore_alias_groups,
>  };
>  
> +static struct intel_uncore_type dmr_uncore_dda = {
> +	.name			= "dda",
> +	.event_mask_ext		= DMR_HAMVF_EVENT_MASK_EXT,
> +	.format_group		= &dmr_sca_uncore_format_group,
> +	.attr_update		= uncore_alias_groups,
> +};
> +
> +static struct intel_uncore_type dmr_uncore_sbo = {
> +	.name			= "sbo",
> +	.event_mask_ext		= DMR_HAMVF_EVENT_MASK_EXT,
> +	.format_group		= &dmr_sca_uncore_format_group,
> +	.attr_update		= uncore_alias_groups,
> +};
> +
>  static struct intel_uncore_type dmr_uncore_ubr = {
>  	.name			= "ubr",
>  	.event_mask_ext		= DMR_HAMVF_EVENT_MASK_EXT,
> @@ -6901,10 +6937,15 @@ static struct intel_uncore_type *dmr_uncores[UNCORE_DMR_NUM_UNCORE_TYPES] = {
>  	NULL, NULL, NULL,
>  	NULL, NULL,
>  	&dmr_uncore_hamvf,
> -	NULL,
> -	NULL, NULL, NULL,
> +	&dmr_uncore_cbo,
> +	&dmr_uncore_santa,
> +	&dmr_uncore_cncu,
> +	&dmr_uncore_sncu,
>  	&dmr_uncore_ula,
> -	NULL, NULL, NULL, NULL,
> +	&dmr_uncore_dda,
> +	NULL,
> +	&dmr_uncore_sbo,
> +	NULL,
>  	NULL, NULL, NULL,
>  	&dmr_uncore_ubr,
>  	NULL,
> @@ -6919,6 +6960,7 @@ static struct intel_uncore_type *dmr_uncores[UNCORE_DMR_NUM_UNCORE_TYPES] = {
>  
>  int dmr_uncore_units_ignore[] = {
>  	0x13,		/* MSE */
> +	0x25,		/* SB2UCIE */
>  	UNCORE_IGNORE_END
>  };
>  

LGTM. Reviewed-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>