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Message-Id: <20251223-enable-qualcomm-crypto-engine-for-lemans-v1-1-f2c8f8e4f3cd@oss.qualcomm.com>
Date: Tue, 23 Dec 2025 14:24:20 +0530
From: Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
To: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
Subject: [PATCH] arm64: dts: qcom: lemans: add QCrypto node

Add Qualcomm Crypto Engine device node for LeMans platform.

Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
---
QCE and Crypto DMA nodes patch was applied as part of the
commit 7ff3da43ef44 ("arm64: dts: qcom: sa8775p: add QCrypto nodes"),
however was partially reverted by commit 92979f12a201 ("arm64: dts:
qcom: sa8775p: Partially revert "arm64: dts: qcom: sa8775p: add
QCrypto nodes"") due to compatible-string being miss-matched
against schema.

Resubmitting the enablement of QCE device node for lemans platform
with compatible-string being aligned with qcom-qce schema.

Bindings and Crypto DMA nodes for the same platform is already
present in the tree.
---
 arch/arm64/boot/dts/qcom/lemans.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 0b154d57ba24e69a9d900f06bbb22baa2781cc3f..342afcb207939a74d2ce4d7fd655840f0208dd2a 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -2769,6 +2769,18 @@ cryptobam: dma-controller@...4000 {
 				 <&apps_smmu 0x481 0x00>;
 		};
 
+		crypto: crypto@...a000 {
+			compatible = "qcom,sa8775p-qce", "qcom,sm8150-qce", "qcom,qce";
+			reg = <0x0 0x01dfa000 0x0 0x6000>;
+			dmas = <&cryptobam 4>, <&cryptobam 5>;
+			dma-names = "rx", "tx";
+			iommus = <&apps_smmu 0x480 0x0>,
+				 <&apps_smmu 0x481 0x0>;
+			interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 0
+					 &mc_virt SLAVE_EBI1 0>;
+			interconnect-names = "memory";
+		};
+
 		ctcu@...1000 {
 			compatible = "qcom,sa8775p-ctcu";
 			reg = <0x0 0x04001000 0x0 0x1000>;

---
base-commit: cc3aa43b44bdb43dfbac0fcb51c56594a11338a8
change-id: 20251222-enable-qualcomm-crypto-engine-for-lemans-4213e8b2354b

Best regards,
-- 
Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>


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