linux-kernel - Re: [PATCH 0/8] Add Axiado AX3000 eMMC Host Controller Support

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Message-ID: <20251223-black-auk-of-priority-8b48ae@quoll>
Date: Tue, 23 Dec 2025 15:33:14 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Tzu-Hao Wei <twei@...ado.com>
Cc: SriNavmani A <srinavmani@...ado.com>, 
	Prasad Bolisetty <pbolisetty@...ado.com>, Vinod Koul <vkoul@...nel.org>, 
	Neil Armstrong <neil.armstrong@...aro.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Harshit Shah <hshah@...ado.com>, Ulf Hansson <ulf.hansson@...aro.org>, 
	Adrian Hunter <adrian.hunter@...el.com>, Michal Simek <michal.simek@....com>, 
	linux-phy@...ts.infradead.org, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org
Subject: Re: [PATCH 0/8] Add Axiado AX3000 eMMC Host Controller Support

On Mon, Dec 22, 2025 at 04:44:59PM +0800, Tzu-Hao Wei wrote:
> This patch series adds support for the eMMC host controller found on
> the Axiado AX3000 SoC. The implementation includes support for an
> external Arasan eMMC PHY that enables HS200 mode operation at 200 MHz,
> significantly improving performance over the default 25 MHz operation.
> 
> Hardware Details:
> 
> Arasan eMMC host controller on AX3000 SoC
> External Arasan eMMC PHY (different from internal PHY supported
> by the standard sdhci-of-arasan driver)
> Support for HS200 mode (200 MHz) operation
> Integration with existing SDHCI framework
> Implementation Overview:
> The series adds support for the external eMMC PHY required for HS200
> mode. The existing sdhci-of-arasan.c driver supports internal PHY
> configurations, but the AX3000 uses an external PHY that requires
> different configuration. The PHY driver was implemented based on the
> reference code in sdhci-pci-arasan.c as recommended by the Arasan team.
> 
> This series includes:
> 1. Device tree bindings for the eMMC PHY
> 2. PHY driver implementation for the external Arasan eMMC PHY
> 3. Integration of PHY support into the sdhci-of-arasan host driver
> 4. Device tree bindings for the eMMC host controller variant
> 5. Device tree source files for the SoC and EVK board
> 6. MAINTAINERS file update

You completely disorganized the patch.. dts is mixed all over driver
code, you combined two or three completely independent subsystems into
one.

Read submitting patches in DT dir to understand how DTS must be sent.


Best regards,
Krzysztof