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Message-ID: <9870fd41-bafb-4ab0-91ff-8fcea53ca0a9@lunn.ch>
Date: Wed, 24 Dec 2025 14:51:11 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Xu Yang <xu.yang_2@....com>
Cc: vkoul@...nel.org, neil.armstrong@...aro.org, shawnguo@...nel.org,
kernel@...gutronix.de, festevam@...il.com, jun.li@....com,
Frank.Li@....com, linux-phy@...ts.infradead.org,
imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] phy: fsl-imx8mq-usb: add debugfs to access control
register
On Wed, Dec 24, 2025 at 07:17:16PM +0800, Xu Yang wrote:
> The CR port is a simple 16-bit data/address parallel port that is
> provided for on-chip access to the control registers inside the
> USB 3.0 femtoPHY. While access to these registers is not required
> for normal PHY operation, this interface enables you to access
> some of the PHY’s diagnostic features during normal operation or
> to override some basic PHY control signals.
>
> 3 debugfs files are created to read and write control registers,
> all use hexadecimal format:
> ctrl_reg_base: the register offset to write, or the start offset
> to read.
> ctrl_reg_count: how many continuous registers to be read.
> ctrl_reg_value: read to show the continuous registers value from
> the offset in ctrl_reg_base, to ctrl_reg_base
> + ctrl_reg_count - 1, one line for one register.
> when write, override the register at ctrl_reg_base,
> one time can only change one 16bits register.
Are the registers openly documented somewhere? Could you include a
link in the commit message.
Andrew
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