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Message-Id: <20251224-intf-fix-wd-v4-0-07a0926fafd2@oss.qualcomm.com>
Date: Wed, 24 Dec 2025 17:33:48 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Rob Clark <robin.clark@....qualcomm.com>,
Dmitry Baryshkov <lumag@...nel.org>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Jessica Zhang <jesszhan0024@...il.com>, Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Teguh Sobirin <teguh@...ir.in>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: [PATCH v4 0/2] drm/msm/dpu: fix vsync source programming on DPU >=
8.0
Currently VSYNC SEL programming is performed only if there is a
corresponding callback at the top block. However, DPU >= 8.0 don't have
that callback, making the driver skip all vsync programming. Make the
driver always check both TOP and INTF callbacks.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
---
Changes in v3:
- Picked up the series per agreement with Teguh
- Fixed VSYNC SEL programming on DPU < 5.x (Marijn)
- Implemented WD timer support on DPU 8.x
- Link to v2: https://lore.kernel.org/r/TYUPR06MB6099C539BD2C937F8630FF8EDDD5A@TYUPR06MB6099.apcprd06.prod.outlook.com
---
Dmitry Baryshkov (1):
drm/msm/dpu: fix WD timer handling on DPU 8.x
Teguh Sobirin (1):
drm/msm/dpu: Set vsync source irrespective of mdp top support
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 17 +++++-----
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 48 +++++++++++++++++++++++++++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 3 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 7 -----
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 7 +++++
5 files changed, 63 insertions(+), 19 deletions(-)
---
base-commit: d2b6e710d2706c8915fe5e2f961c3365976d2ae1
change-id: 20251224-intf-fix-wd-95862f167fd7
Best regards,
--
With best wishes
Dmitry
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