lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20251228065241.21144-1-wbg@kernel.org>
Date: Sun, 28 Dec 2025 15:52:40 +0900
From: William Breathitt Gray <wbg@...nel.org>
To: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: William Breathitt Gray <wbg@...nel.org>,
	robh@...nel.org,
	conor+dt@...nel.org,
	krzk+dt@...nel.org,
	s32@....com,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-iio@...r.kernel.org,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 3/3] counter: Add STM based counter

On Wed, Dec 17, 2025 at 08:49:57AM +0100, Daniel Lezcano wrote:
> The NXP S32G2 automotive platform integrates four Cortex-A53 cores and
> three Cortex-M7 cores, along with a large number of timers and
> counters. These hardware blocks can be used as clocksources or
> clockevents, or as timestamp counters shared across the various
> subsystems running alongside the Linux kernel, such as firmware
> components. Their actual usage depends on the overall platform
> software design.
> 
> In a Linux-based system, the kernel controls the counter, which is a
> read-only shared resource for the other subsystems. One of its primary
> purposes is to act as a common timestamp source for messages or
> traces, allowing correlation of events occurring in different
> operating system contexts.
> 
> These changes introduce a basic counter driver that can start, stop,
> and reset the counter. It also handles overflow accounting and
> configures the prescaler value.
> 
> Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>

Hi Daniel,

It sounds like you're trying to implement a clock for timestamping.
Although the Generic Counter interface is flexible enough to shoehorn a
a clock into its representation, I don't believe it's the right
abstraction for this particular device. Perhaps reimplementing this
driver under the Linux common clock framework would be a better approach
to achieve what you want.

Regardless, if you do pursue a Counter driver you'll need to follow the
Generic Counter paradigm[^1] and define at least three core components:
a Signal, a Synapse, and a Count. Resetting the Count is typically
implemented by defining a struct counter_ops counter_write()
callback[^2], while overflows are typically implemented by pushing
COUNTER_EVENT_OVERFLOW Counter events[^3] that can be watched by
userspace.

William Breathitt Gray

[^1] https://docs.kernel.org/driver-api/generic-counter.html#paradigm
[^2] https://docs.kernel.org/driver-api/generic-counter.html#c.counter_ops
[^3] https://docs.kernel.org/driver-api/generic-counter.html#counter-events

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ