linux-kernel - Re: [PATCH 0/2] PCI/ASPM: Avoid L0s and L1 on Sophgo 2042/2044 PCIe Root Ports

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Message-ID: <20251229151152.GA57954@bhelgaas>
Date: Mon, 29 Dec 2025 09:11:52 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: Chen Wang <unicorn_wang@...look.com>
Cc: Inochi Amaoto <inochiama@...il.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>, Han Gao <rabenda.cn@...il.com>,
	Manivannan Sadhasivam <mani@...nel.org>, linux-pci@...r.kernel.org,
	linux-kernel@...r.kernel.org, Yixun Lan <dlan@...too.org>,
	Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH 0/2] PCI/ASPM: Avoid L0s and L1 on Sophgo 2042/2044 PCIe
 Root Ports

On Mon, Dec 29, 2025 at 08:17:40AM +0800, Chen Wang wrote:
> On 12/27/2025 12:30 AM, Bjorn Helgaas wrote:
> > On Thu, Dec 25, 2025 at 06:05:27PM +0800, Inochi Amaoto wrote:
> > > Since commit f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM
> > > states for devicetree platforms") force enable ASPM on all device tree
> > > platform, the SG2042/SG2044 PCIe Root Ports breaks as it advertises L0s
> > > and L1 capabilities without supporting it.
> > > 
> > > Override the L0s and L1 Support advertised in Link Capabilities by the
> > > SG2042/SG2044 Root Ports so we don't try to enable those states.
> > > 
> > > Inochi Amaoto (2):
> > >    PCI/ASPM: Avoid L0s and L1 on Sophgo 2042 PCIe [1f1c:2042] Root Ports
> > >    PCI/ASPM: Avoid L0s and L1 on Sophgo 2044 PCIe [1f1c:2044] Root Ports
> > > 
> > >   drivers/pci/quirks.c    | 2 ++
> > >   include/linux/pci_ids.h | 2 ++
> > >   2 files changed, 4 insertions(+)
> ...

> > 2) Why don't we have a MAINTAINERS entry for this driver?  I failed to
> > notice that the series we applied
> > (https://lore.kernel.org/all/cover.1757643388.git.unicorn_wang@outlook.com/)
> > does not include a maintainer.  Chen, since you posted that series,
> > are you willing to sign up to maintain it?
>
> Sorry, I didn't realize I needed to submit maintainer information
> separately for each driver when I submitted the PCIe driver code.
> 
> Yes, I will be maintaining the SG2042 PCIe driver. Do I need to add
> an entry to the MAINTAINERS file?

Yes, please.

  $ ./scripts/get_maintainer.pl drivers/pci/controller/cadence/pcie-sg2042.c
  Lorenzo Pieralisi <lpieralisi@...nel.org> (maintainer:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS)
  "Krzysztof Wilczyński" <kwilczynski@...nel.org> (maintainer:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS)
  Manivannan Sadhasivam <mani@...nel.org> (maintainer:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS,commit_signer:2/2=100%)
  ...
  Chen Wang <unicorn_wang@...look.com> (commit_signer:2/2=100%,authored:1/2=50%,added_lines:134/134=100%)

This does list you, but only as a commit signer.  It should list you
as a maintainer of the driver so people know to send patches to you
(and cc linux-pci, of course).

Bjorn