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Message-ID: <20251229183602.823275-1-srinivas.pandruvada@linux.intel.com>
Date: Mon, 29 Dec 2025 10:36:02 -0800
From: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
To: hansg@...nel.org,
	ilpo.jarvinen@...ux.intel.com
Cc: platform-driver-x86@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Subject: [PATCH] platform/x86: ISST: Optimize suspend/resume callbacks

If SST-CP or SST-PP is not supported then don't store configuration
during suspend callback and restore during resume callback.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
---
 .../x86/intel/speed_select_if/isst_tpmi_core.c  | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
index a624e0b2991f..5c4e1b4c0131 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
@@ -1721,6 +1721,9 @@ void tpmi_sst_dev_remove(struct auxiliary_device *auxdev)
 }
 EXPORT_SYMBOL_NS_GPL(tpmi_sst_dev_remove, "INTEL_TPMI_SST");
 
+#define SST_PP_CAP_MASK_BIT_CP_ENABLE	0
+#define SST_PP_CAP_MASK_BIT_PP_ENABLE	1
+
 void tpmi_sst_dev_suspend(struct auxiliary_device *auxdev)
 {
 	struct tpmi_sst_struct *tpmi_sst = auxiliary_get_drvdata(auxdev);
@@ -1741,6 +1744,9 @@ void tpmi_sst_dev_suspend(struct auxiliary_device *auxdev)
 		if (!pd_info || !pd_info->sst_base)
 			continue;
 
+		if (!(pd_info->sst_header.cap_mask & BIT(SST_PP_CAP_MASK_BIT_CP_ENABLE)))
+			goto process_pp_suspend;
+
 		cp_base = pd_info->sst_base + pd_info->sst_header.cp_offset;
 
 		pd_info->saved_sst_cp_control = readq(cp_base + SST_CP_CONTROL_OFFSET);
@@ -1749,6 +1755,10 @@ void tpmi_sst_dev_suspend(struct auxiliary_device *auxdev)
 		memcpy_fromio(pd_info->saved_clos_assocs, cp_base + SST_CLOS_ASSOC_0_OFFSET,
 			      sizeof(pd_info->saved_clos_assocs));
 
+process_pp_suspend:
+		if (!(pd_info->sst_header.cap_mask & BIT(SST_PP_CAP_MASK_BIT_PP_ENABLE)))
+			continue;
+
 		pd_info->saved_pp_control = readq(pd_info->sst_base +
 						  pd_info->sst_header.pp_offset +
 						  SST_PP_CONTROL_OFFSET);
@@ -1776,6 +1786,9 @@ void tpmi_sst_dev_resume(struct auxiliary_device *auxdev)
 		if (!pd_info || !pd_info->sst_base)
 			continue;
 
+		if (!(pd_info->sst_header.cap_mask & BIT(SST_PP_CAP_MASK_BIT_CP_ENABLE)))
+			goto process_pp_resume;
+
 		cp_base = pd_info->sst_base + pd_info->sst_header.cp_offset;
 		writeq(pd_info->saved_sst_cp_control, cp_base + SST_CP_CONTROL_OFFSET);
 		memcpy_toio(cp_base + SST_CLOS_CONFIG_0_OFFSET, pd_info->saved_clos_configs,
@@ -1783,6 +1796,10 @@ void tpmi_sst_dev_resume(struct auxiliary_device *auxdev)
 		memcpy_toio(cp_base + SST_CLOS_ASSOC_0_OFFSET, pd_info->saved_clos_assocs,
 			    sizeof(pd_info->saved_clos_assocs));
 
+process_pp_resume:
+		if (!(pd_info->sst_header.cap_mask & BIT(SST_PP_CAP_MASK_BIT_PP_ENABLE)))
+			continue;
+
 		writeq(pd_info->saved_pp_control, power_domain_info->sst_base +
 		       pd_info->sst_header.pp_offset + SST_PP_CONTROL_OFFSET);
 	}
-- 
2.52.0


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