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Message-ID: <20251229190349.GBaVLQlajFqzCyruij@fat_crate.local>
Date: Mon, 29 Dec 2025 20:03:49 +0100
From: Borislav Petkov <bp@...en8.de>
To: Rong Zhang <i@...g.moe>
Cc: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>,
Mario Limonciello <superm1@...nel.org>,
linux-kernel@...r.kernel.org, stable@...nel.org
Subject: Re: [PATCH] x86/microcode/AMD: Fix Entrysign revision check for
Zen5/Strix Halo
On Tue, Dec 30, 2025 at 02:22:21AM +0800, Rong Zhang wrote:
> Zen5 also contains Family 1Ah Models 70h-7Fh, which are mistakenly
> missing from cpu_has_entrysign().
>
> Fix it by merging the missing range into the current one.
>
> Fixes: 8a9fb5129e8e ("x86/microcode/AMD: Limit Entrysign signature checking to known generations")
> Cc: stable@...nel.org
> Signed-off-by: Rong Zhang <i@...g.moe>
> ---
> arch/x86/kernel/cpu/microcode/amd.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
> index 3821a985f4ff..46673530bc6f 100644
> --- a/arch/x86/kernel/cpu/microcode/amd.c
> +++ b/arch/x86/kernel/cpu/microcode/amd.c
> @@ -258,7 +258,7 @@ static bool cpu_has_entrysign(void)
> if (fam == 0x1a) {
> if (model <= 0x2f ||
> (0x40 <= model && model <= 0x4f) ||
> - (0x60 <= model && model <= 0x6f))
> + (0x60 <= model && model <= 0x7f))
I wonder how I managed to generate this crap - my AI must've been
hallucinating that day. :)
Especially since cpu/amd.c already has:
case 0x60 ... 0x7f:
setup_force_cpu_cap(X86_FEATURE_ZEN5);
Oh well...
Thanks for the catch!
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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