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Message-ID: <aVNZPOHHZn2U5N_R@sumit-xelite>
Date: Tue, 30 Dec 2025 10:16:52 +0530
From: Sumit Garg <sumit.garg@...nel.org>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
andersson@...nel.org, konradybcio@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, akhilpo@....qualcomm.com,
vikash.garodia@....qualcomm.com, dikshita.agarwal@....qualcomm.com,
robin.clark@....qualcomm.com, lumag@...nel.org,
linux-kernel@...r.kernel.org,
Sumit Garg <sumit.garg@....qualcomm.com>
Subject: Re: [PATCH 2/2] arm64: dts: qcom: agatti: Address Gunyah memory
alignment needs
On Mon, Dec 29, 2025 at 01:43:18PM +0100, Konrad Dybcio wrote:
> On 12/29/25 8:12 AM, Sumit Garg wrote:
> > From: Sumit Garg <sumit.garg@....qualcomm.com>
> >
> > Gunyah hypervisor requires it's memory start address to be 2MB aligned.
> > So the address map for Agatti is updated to incorporate that requirement.
> > This should be a backwards compatible DT change which should work with
> > legacy QHEE based firmware stack too.
> >
> > Signed-off-by: Sumit Garg <sumit.garg@....qualcomm.com>
> > ---
> > arch/arm64/boot/dts/qcom/agatti.dtsi | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/agatti.dtsi b/arch/arm64/boot/dts/qcom/agatti.dtsi
> > index e705eb24160a..153916980ac0 100644
> > --- a/arch/arm64/boot/dts/qcom/agatti.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/agatti.dtsi
> > @@ -298,8 +298,8 @@ reserved_memory: reserved-memory {
> > #size-cells = <2>;
> > ranges;
> >
> > - hyp_mem: hyp@...00000 {
> > - reg = <0x0 0x45700000 0x0 0x600000>;
> > + hyp_mem: hyp@...00000 {
> > + reg = <0x0 0x45600000 0x0 0x700000>;
>
> On a second thought, please add a comment like:
>
> /* Gunyah requires the start of the region to be 2MiB-aligned, QHEE doesn't care */
>
> to prevent someone "fixing" it in the future
Sounds reasonable, I will add this comment on the next spin. I hope that
I can keep you review tag with comment added.
-Sumit
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