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Message-ID: <138b59d1-e001-4c9b-bf8b-a5af703d747a@lunn.ch>
Date: Tue, 30 Dec 2025 11:53:17 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Stefano Radaelli <stefano.radaelli21@...il.com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Stefano Radaelli <stefano.r@...iscite.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Alexander Stein <alexander.stein@...tq-group.com>,
Dario Binacchi <dario.binacchi@...rulasolutions.com>,
Yannic Moog <y.moog@...tec.de>,
Primoz Fiser <primoz.fiser@...ik.com>,
Markus Niebel <Markus.Niebel@...group.com>,
Josua Mayer <josua@...id-run.com>,
Francesco Dolcini <francesco.dolcini@...adex.com>,
imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 3/3] arm64: dts: imx95-var-dart: Add support for
Variscite Sonata board
> + sfp0: sfp {
> + compatible = "sff,sfp";
> + i2c-bus = <&lpi2c3>;
> + los-gpios = <&pca9534 1 GPIO_ACTIVE_HIGH>;
Minimalist for GPIOs, but O.K.
> + maximum-power-milliwatt = <2000>;
> + };
> +};
> +
> +&enetc_port1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enetc1>;
> + phy-handle = <ðphy1>;
> + /*
> + * The required RGMII TX and RX 2ns delays are implemented directly
> + * in hardware via passive delay elements on the SOM PCB.
> + * No delay configuration is needed in software via PHY driver.
> + */
> + phy-mode = "rgmii";
> + status = "okay";
> +};
> +
> +&enetc_port2 {
> + phy-mode = "10gbase-r";
> + sfp = <&sfp0>;
> + status = "okay";
> +
> + fixed-link {
> + speed = <10000>;
> + full-duplex;
> + };
> +};
The fixed link is not needed. phylink will ask the SFP plugged into
the cage what it is, and then configure the MAC as needed, 10GBase-R,
5GBase-X, 2.5BaseX, 1000BaseX, SGMII etc.
Andrew
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