[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <aVP1IxpDNUvLzHHz@lizhi-Precision-Tower-5810>
Date: Tue, 30 Dec 2025 10:52:03 -0500
From: Frank Li <Frank.li@....com>
To: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
Cc: tomm.merciai@...il.com, linux-renesas-soc@...r.kernel.org,
biju.das.jz@...renesas.com,
Wolfram Sang <wsa+renesas@...g-engineering.com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
linux-i3c@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 4/4] i3c: renesas: Add suspend/resume support
On Tue, Dec 30, 2025 at 11:39:39AM +0100, Tommaso Merciai wrote:
> The Renesas I3C controller does not retain its register state across system
> suspend, requiring the driver to explicitly save and restore hardware
> configuration.
>
> Add suspend and resume NOIRQ callbacks to handle system sleep transitions.
>
> During suspend, save the Device Address Table (DAT) entries, assert reset
> lines, and disable all related clocks to allow the controller to enter a
> low-power state.
>
> On resume, re-enable clocks and reset lines in the proper order. Restore
> the REFCKCTL register, master dynamic address, and all DAT entries, then
> reinitialize the controller.
>
> Store the REFCLK divider value, and the master dynamic address to restore
> timing and addressing configuration after resume.
>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
> ---
> v1->v2:
> - Updated commit as v1 has been split into smaller patches.
> - Use clock bulk API into renesas_i3c_suspend_noirq() and
> renesas_i3c_resume_noirq().
> - Updated commit body accordingly.
>
> drivers/i3c/master/renesas-i3c.c | 85 ++++++++++++++++++++++++++++++++
> 1 file changed, 85 insertions(+)
>
> diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-i3c.c
> index 4f076c372b36..f089bbf19fa5 100644
> --- a/drivers/i3c/master/renesas-i3c.c
> +++ b/drivers/i3c/master/renesas-i3c.c
> @@ -254,16 +254,19 @@ struct renesas_i3c {
> enum i3c_internal_state internal_state;
> u16 maxdevs;
> u32 free_pos;
> + u32 dyn_addr;
> u32 i2c_STDBR;
> u32 i3c_STDBR;
> unsigned long rate;
> u8 addrs[RENESAS_I3C_MAX_DEVS];
> struct renesas_i3c_xferqueue xferqueue;
> void __iomem *regs;
> + u32 *DATBASn;
> struct clk_bulk_data clks[3];
> u8 num_clks;
> struct reset_control *presetn;
> struct reset_control *tresetn;
> + u8 refclk_div;
> };
>
> struct renesas_i3c_i2c_dev_data {
> @@ -615,6 +618,7 @@ static int renesas_i3c_bus_init(struct i3c_master_controller *m)
> EXTBR_EBRHP(pp_high_ticks));
>
> renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(cks));
> + i3c->refclk_div = cks;
>
> /* I3C hw init*/
> renesas_i3c_hw_init(i3c);
> @@ -623,6 +627,7 @@ static int renesas_i3c_bus_init(struct i3c_master_controller *m)
> if (ret < 0)
> return ret;
>
> + i3c->dyn_addr = ret;
> renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYAD(ret) | MSDVAD_MDYADV);
>
> memset(&info, 0, sizeof(info));
> @@ -1390,6 +1395,13 @@ static int renesas_i3c_probe(struct platform_device *pdev)
> i3c->maxdevs = RENESAS_I3C_MAX_DEVS;
> i3c->free_pos = GENMASK(i3c->maxdevs - 1, 0);
>
> + /* Allocate dynamic Device Address Table backup. */
> + i3c->DATBASn = devm_kzalloc(&pdev->dev,
> + sizeof(u32) * i3c->maxdevs,
> + GFP_KERNEL);
nit: can you move it to previous line to reduce line number
> + if (!i3c->DATBASn)
> + return -ENOMEM;
> +
> return i3c_master_register(&i3c->base, &pdev->dev, &renesas_i3c_ops, false);
> }
>
> @@ -1400,6 +1412,78 @@ static void renesas_i3c_remove(struct platform_device *pdev)
> i3c_master_unregister(&i3c->base);
> }
>
> +static int renesas_i3c_suspend_noirq(struct device *dev)
> +{
> + struct renesas_i3c *i3c = dev_get_drvdata(dev);
> + int i, ret;
> +
> + i2c_mark_adapter_suspended(&i3c->base.i2c);
> +
> + /* Store Device Address Table values. */
> + for (i = 0; i < i3c->maxdevs; i++)
> + i3c->DATBASn[i] = renesas_readl(i3c->regs, DATBAS(i));
> +
> + ret = reset_control_assert(i3c->presetn);
> + if (ret)
> + return ret;
> +
> + ret = reset_control_assert(i3c->tresetn);
> + if (ret) {
> + reset_control_deassert(i3c->presetn);
> + return ret;
> + }
> +
> + clk_bulk_disable_unprepare(i3c->num_clks, i3c->clks);
> +
> + return 0;
> +}
> +
> +static int renesas_i3c_resume_noirq(struct device *dev)
> +{
> + struct renesas_i3c *i3c = dev_get_drvdata(dev);
> + int i, ret;
> +
> + ret = reset_control_deassert(i3c->presetn);
> + if (ret)
> + return ret;
> +
> + ret = reset_control_deassert(i3c->tresetn);
> + if (ret)
> + goto err_presetn;
> +
> + ret = clk_bulk_prepare_enable(i3c->num_clks, i3c->clks);
> + if (ret)
> + goto err_tresetn;
> +
> + /* Re-store I3C registers value. */
> + renesas_writel(i3c->regs, REFCKCTL,
> + REFCKCTL_IREFCKS(i3c->refclk_div));
> + renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYADV |
> + MSDVAD_MDYAD(i3c->dyn_addr));
> +
> + /* Restore Device Address Table values. */
> + for (i = 0; i < i3c->maxdevs; i++)
> + renesas_writel(i3c->regs, DATBAS(i), i3c->DATBASn[i]);
> +
> + /* I3C hw init. */
> + renesas_i3c_hw_init(i3c);
> +
> + i2c_mark_adapter_resumed(&i3c->base.i2c);
> +
> + return 0;
> +
> +err_tresetn:
> + clk_bulk_disable_unprepare(i3c->num_clks, i3c->clks)
look like it should be
reset_control_assert(i3c->tresetn);
Frank
> +err_presetn:
> + reset_control_assert(i3c->presetn);
> + return ret;
> +}
> +
> +static const struct dev_pm_ops renesas_i3c_pm_ops = {
> + NOIRQ_SYSTEM_SLEEP_PM_OPS(renesas_i3c_suspend_noirq,
> + renesas_i3c_resume_noirq)
> +};
> +
> static const struct renesas_i3c_config empty_i3c_config = {
> };
>
> @@ -1420,6 +1504,7 @@ static struct platform_driver renesas_i3c = {
> .driver = {
> .name = "renesas-i3c",
> .of_match_table = renesas_i3c_of_ids,
> + .pm = pm_sleep_ptr(&renesas_i3c_pm_ops),
> },
> };
> module_platform_driver(renesas_i3c);
> --
> 2.43.0
>
Powered by blists - more mailing lists