Message-ID: <2ab3f704-22ef-4e75-bedf-95c1956e312b@riscstar.com>
Date: Tue, 30 Dec 2025 12:01:38 -0600
From: Alex Elder <elder@...cstar.com>
To: Rob Herring <robh@...nel.org>
Cc: Guodong Xu <guodong@...cstar.com>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Paul Walmsley <pjw@...nel.org>,
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
 Alexandre Ghiti <alex@...ti.fr>, Yixun Lan <dlan@...too.org>,
 Daniel Lezcano <daniel.lezcano@...aro.org>,
 Thomas Gleixner <tglx@...utronix.de>,
 Samuel Holland <samuel.holland@...ive.com>, Anup Patel
 <anup@...infault.org>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Jiri Slaby <jirislaby@...nel.org>, Lubomir Rintel <lkundrak@...sk>,
 Yangyu Chen <cyy@...self.name>, Paul Walmsley <paul.walmsley@...ive.com>,
 Conor Dooley <conor@...nel.org>, Heinrich Schuchardt <xypron.glpk@....de>,
 Kevin Meng Zhang <zhangmeng.kevin@...ux.spacemit.com>,
 Andrew Jones <ajones@...tanamicro.com>, devicetree@...r.kernel.org,
 linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
 spacemit@...ts.linux.dev, linux-serial@...r.kernel.org
Subject: Re: [PATCH v2 11/13] dt-bindings: riscv: Add Supm extension
 description

On 12/30/25 9:21 AM, Rob Herring wrote:
> On Mon, Dec 29, 2025 at 9:14 PM Alex Elder <elder@...cstar.com> wrote:
>>
>> On 12/29/25 8:13 PM, Rob Herring wrote:
>>> On Fri, Dec 26, 2025 at 03:28:47PM -0600, Alex Elder wrote:
>>>> On 12/22/25 7:04 AM, Guodong Xu wrote:
>>>>> Add description for the Supm extension. Supm indicates support for pointer
>>>>> masking in user mode. Supm is mandatory for RVA23S64.
>>>>>
>>>>> The Supm extension is ratified in commit d70011dde6c2 ("Update to ratified
>>>>> state") of riscv-j-extension.
>>>>>
>>>>> Supm depends on either Smnpm or Ssnpm, so add a schema check to enforce
>>>>> this dependency.
>>>>
>>>> I have the same general question on this, about whether it's really
>>>> necessary for the DT binding to enforce these requirements.  The
>>>> RISC-V specifications are what truly defines their meaning, so I
>>>> don't really see why the DT framework should need to enforce them.
>>>> (That said, I'm sure there are other cases where DT enforces things
>>>> it shouldn't have to.)
>>>
>>> Does the specification have some way to check it? What happens if a DT
>>> is wrong? Are you going to require a DT update to make things right? Or
>>> the kernel has to work-around the error? Neither is great. So having
>>> this as a schema makes sense to prevent either scenario.
>>
>> I'm really glad you weighed in.  I actually have several questions
>> related to RISC-V extensions and DT.  But for now I'll focus on
>> just this...
>>
>> To answer your first question, I'm not sure how the specification
>> is "checked", or what "it" is that you're asking about for that
>> matter.  Also I think we have to be clear about what "wrong" means.
>>
>> RISC-V is defined by a (large and growing) set of specifications
>> that are developed through a well-defined process.  When a spec
>> is *ratified* it is committed, and it won't be changed.  These
>> specifications are ultimately *the* definition of RISC-V
>> compliance.
>>
>> I assumed the "wrong" you're talking about is a DTS/DTB that has
>> been committed but somehow does not match what a RISC-V spec
>> says, but I might be mistaken.
> 
> That's correct.
> 
>> Anyway, we can flip that around and have a similar problem:  What
>> if we define the DT binding in such a way that it doesn't match
>> the RISC-V spec?  The (ratified) RISC-V spec is right.
> 
> Sure. Any time there is more than 1 source of truth, they could be
> mismatched. But it is 1 spec and 1 schema to compare, not N DTS files.
> Checking the schema matches the spec is much easier than reviewing
> every new DTS file.

Yes, I understand that and I agree.  We *do* have tools to
verify DT files against bindings, and at least in this
domain we don't have tools to verify against the RISC-V
specs.

> The only true fix is to make the spec machine readable.

But barring that, we can define the DT binding and try to
ensure it exactly matches the RISC-V specs.

>> My thought was that we should have software do the verification,
>> and recommend the software (e.g. arch/riscv/kernel/cpufeature.c
>> in Linux) be updated to verify things before committing to a
>> DT binding.
> 
> That moves validation from build time to run time. How is that better?
> And what about other OSs?

OK I concede that encoding the logic in the DT binding is
a good practical solution and I take back my suggestion.

> I'm very much of the opinion that it is not the kernel's job to
> validate the DT. It obviously has not done a very good job given

This is exactly what I wanted your opinion on.  I mean, I
already agreed with this statement, but the existence of a
different (RISC-V) spec as a source of truth made me consider
that maybe it wasn't DT's job to validate some things.

> issues we find with schemas. It's fine to have some checks in this
> case if the kernel can't function (or use/enable the extension)
> without the dependent extensions, but there are lots of classes of
> errors the kernel doesn't need to care about.
> 
>> To me, C code is more general and more universally understandable
>> than YAML rules, but I'm biased by how well I work with C versus
>> YAML schemas.
> 
> Personally, if I was going to do validation with code, I would pick
> python or any language that can handle lists and dicts natively. I too
> would prefer C for everything, but it's not the best tool for the job

My point was about DT binding logic versus kernel code logic.  But
yes I agree with what you're saying here.

> here. Even if we decided to do validation in C (I'm pretty sure we had
> a proposal to do just that at some point), we'd just end up defining
> our own data structures of validation data. Because at the end of the
> day, most of the validation information is all the same structure of
> data (i.e. a list of properties with lists of allowed values). I'd
> much rather follow some standard (json-schema) that's already
> documented than try to come up with my own poorly documented
> invention.
> 
> I do think there is some need for code based validation as there are
> some things which can't be expressed with schemas. We have some of
> that in dtc, but that only works for core bindings. Some sort of
> python snippets of code in schemas is kind of what I'm thinking.

The main things I take away from this discussion:
- DT bindings *should* encode constraints for RISC-V extensions
   to enforce certain requirements from their underlying RISC-V
   specifications.
- The reason to do this is that the DT tools we have can help
   ensure correctness.  And doing it in the binding means it can
   get reviewed once, and the logic will apply to all DTS files
   that adhere to the binding.
- Doing some validation in the kernel is still useful, but anything
   done there needs to replicated in any other code bases that need
   to parse DT files.
- Conor owns this mess. :)

					-Alex

>> In any case, a "wrong" binding is a problem no matter what the
>> reason.  One way or another there are things expressed via DT
>> that must match the RISC-V specifications.  And yes, we do have
>> tools and bindings that can verify things related to DT.
>>
>>>> And now, having looked at these added binding definitions (in patches
>>>> 07 through 11 in this series), I wonder what exactly is required for
>>>> them to be accepted.  For the most part these seem to just be defining
>>>> how the extensions specified for RISC-V are to be expressed in
>>>> DT files.  It seems to be a fairly straightforward copy from the
>>>> ratified specification(s) to the YAML format.
>>>>
>>>> Who need to sign off on it?  Conor?  Paul?  DT maintainers?
>>>
>>> I generally leave this extension mess to Conor.
>>
>> Sounds wise.  Should I address my other few questions on this
>> topic to Conor?  I don't want this particular series to get
>> held up on unrelated discussions.
> 
> Probably so.
> 
> Rob

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