[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <B215717DE5B3F973+806cb099-b491-464b-b9a8-fd12f2cd1e27@radxa.com>
Date: Wed, 31 Dec 2025 16:30:33 +0800
From: Xilin Wu <sophon@...xa.com>
To: Jessica Zhang <jessica.zhang@....qualcomm.com>,
Rob Clark <robdclark@...il.com>, Dmitry Baryshkov <lumag@...nel.org>,
Sean Paul <sean@...rly.run>, Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Abhinav Kumar <quic_abhinavk@...cinc.com>
Cc: Abhinav Kumar <abhinav.kumar@....qualcomm.com>,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/5] drm/msm/dpu: Check mode against PINGPONG or DSC max
width
On 5/15/2025 7:52 AM, Jessica Zhang wrote:
> Validate requested mode and topology based on the PINGPONG or DSC encoder
> max width. In addition, drop MAX_HDISPLAY_SPLIT and base LM reservation
> off of PINGPONG or DSC encoder max width
>
> As noted in the patch, while DPU 8.x+ supports a max linewidth of 8960
> for PINGPONG_0, there is some additional logic that needs to be added to
> the resource manager to specifically try and reserve PINGPONG_0 for
> modes that are greater than 5k.
>
> Since this is out of the scope of this series, add a helper that will
> get the overall minimum PINGPONG max linewidth for a given chipset.
>
> Signed-off-by: Jessica Zhang <jessica.zhang@....qualcomm.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 46 +++++++++++++++++++++++++++-----
> 1 file changed, 39 insertions(+), 7 deletions(-)
>
Thanks for the patches! With patch 2&3 applied on top of v6.18, I'm able
to get DSI panel and DP monitor working simultaneously on qcs6490.
Tested-by: Xilin Wu <sophon@...xa.com> # qcs6490-radxa-dragon-q6a
--
Best regards,
Xilin Wu <sophon@...xa.com>
Powered by blists - more mailing lists