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Message-ID:
<TY3PR01MB1134639E27E86605C6B6270E686BDA@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Wed, 31 Dec 2025 09:08:54 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>, Tommaso Merciai
<tomm.merciai@...il.com>
CC: "linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
wsa+renesas <wsa+renesas@...g-engineering.com>, Alexandre Belloni
<alexandre.belloni@...tlin.com>, Frank Li <Frank.Li@....com>, Philipp Zabel
<p.zabel@...gutronix.de>, Geert Uytterhoeven <geert+renesas@...der.be>,
magnus.damm <magnus.damm@...il.com>, "linux-i3c@...ts.infradead.org"
<linux-i3c@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3 1/4] i3c: renesas: Switch to clk_bulk API and store
clocks in private data
> -----Original Message-----
> From: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
> Sent: 31 December 2025 08:23
> To: Tommaso Merciai <tomm.merciai@...il.com>
> Cc: linux-renesas-soc@...r.kernel.org; Biju Das <biju.das.jz@...renesas.com>; Tommaso Merciai
> <tommaso.merciai.xr@...renesas.com>; wsa+renesas <wsa+renesas@...g-engineering.com>; Alexandre Belloni
> <alexandre.belloni@...tlin.com>; Frank Li <Frank.Li@....com>; Philipp Zabel <p.zabel@...gutronix.de>;
> Geert Uytterhoeven <geert+renesas@...der.be>; magnus.damm <magnus.damm@...il.com>; linux-
> i3c@...ts.infradead.org; linux-kernel@...r.kernel.org
> Subject: [PATCH v3 1/4] i3c: renesas: Switch to clk_bulk API and store clocks in private data
>
> Replace individual devm_clk_get_enabled() calls with the clk_bulk API and store the clock handles in
> the driver's private data structure.
>
> All clocks required by the controller are now acquired and enabled using
> devm_clk_bulk_get_all_enabled(), removing the need for per-SoC clock handling and the
> renesas_i3c_config data.
> The TCLK is accessed via a fixed index in the bulk clock array.
>
> Simplify the code and prepare the driver for upcoming suspend/resume support.
>
> No functional change intended.
>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
> ---
> v2->v3:
> - Added define for TCLK index.
> - Use devm_clk_bulk_get_all_enabled() into renesas_i3c_probe().
> - Improved commit body.
> - Dropped unnecessary static const char * const renesas_i3c_clks[].
> - Removed the need for per-SoC clock handling and the renesas_i3c_config data.
>
> v1->v2:
> - New patch.
>
> drivers/i3c/master/renesas-i3c.c | 43 ++++++++------------------------
> 1 file changed, 11 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-i3c.c
> index 426a418f29b6..1b8f4be9ad67 100644
> --- a/drivers/i3c/master/renesas-i3c.c
> +++ b/drivers/i3c/master/renesas-i3c.c
> @@ -198,6 +198,8 @@
> #define RENESAS_I3C_MAX_DEVS 8
> #define I2C_INIT_MSG -1
>
> +#define RENESAS_I3C_TCLK_IDX 1
> +
> enum i3c_internal_state {
> I3C_INTERNAL_STATE_DISABLED,
> I3C_INTERNAL_STATE_CONTROLLER_IDLE,
> @@ -259,7 +261,8 @@ struct renesas_i3c {
> u8 addrs[RENESAS_I3C_MAX_DEVS];
> struct renesas_i3c_xferqueue xferqueue;
> void __iomem *regs;
> - struct clk *tclk;
> + struct clk_bulk_data *clks;
> + u8 num_clks;
> };
>
> struct renesas_i3c_i2c_dev_data {
> @@ -272,10 +275,6 @@ struct renesas_i3c_irq_desc {
> const char *desc;
> };
>
> -struct renesas_i3c_config {
> - unsigned int has_pclkrw:1;
> -};
> -
> static inline void renesas_i3c_reg_update(void __iomem *reg, u32 mask, u32 val) {
> u32 data = readl(reg);
> @@ -489,7 +488,7 @@ static int renesas_i3c_bus_init(struct i3c_master_controller *m)
> int od_high_ticks, od_low_ticks, i2c_total_ticks;
> int ret;
>
> - rate = clk_get_rate(i3c->tclk);
> + rate = clk_get_rate(i3c->clks[RENESAS_I3C_TCLK_IDX].clk);
> if (!rate)
> return -EINVAL;
>
> @@ -1302,13 +1301,8 @@ static int renesas_i3c_probe(struct platform_device *pdev) {
> struct renesas_i3c *i3c;
> struct reset_control *reset;
> - struct clk *clk;
> - const struct renesas_i3c_config *config = of_device_get_match_data(&pdev->dev);
> int ret, i;
>
> - if (!config)
> - return -ENODATA;
> -
> i3c = devm_kzalloc(&pdev->dev, sizeof(*i3c), GFP_KERNEL);
> if (!i3c)
> return -ENOMEM;
> @@ -1317,19 +1311,11 @@ static int renesas_i3c_probe(struct platform_device *pdev)
> if (IS_ERR(i3c->regs))
> return PTR_ERR(i3c->regs);
>
> - clk = devm_clk_get_enabled(&pdev->dev, "pclk");
> - if (IS_ERR(clk))
> - return PTR_ERR(clk);
> -
> - if (config->has_pclkrw) {
> - clk = devm_clk_get_enabled(&pdev->dev, "pclkrw");
This still an optional clock for RZ/G3S.
> - if (IS_ERR(clk))
> - return PTR_ERR(clk);
> - }
> + ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &i3c->clks);
This will break RZ/G3S as it does not have "pclkrw"
Cheers,
Biju
> + if (ret < 0)
> + return ret;
>
> - i3c->tclk = devm_clk_get_enabled(&pdev->dev, "tclk");
> - if (IS_ERR(i3c->tclk))
> - return PTR_ERR(i3c->tclk);
> + i3c->num_clks = ret;
>
> reset = devm_reset_control_get_optional_exclusive_deasserted(&pdev->dev, "tresetn");
> if (IS_ERR(reset))
> @@ -1374,16 +1360,9 @@ static void renesas_i3c_remove(struct platform_device *pdev)
> i3c_master_unregister(&i3c->base);
> }
>
> -static const struct renesas_i3c_config empty_i3c_config = { -};
> -
> -static const struct renesas_i3c_config r9a09g047_i3c_config = {
> - .has_pclkrw = 1,
> -};
> -
> static const struct of_device_id renesas_i3c_of_ids[] = {
> - { .compatible = "renesas,r9a08g045-i3c", .data = &empty_i3c_config },
> - { .compatible = "renesas,r9a09g047-i3c", .data = &r9a09g047_i3c_config },
> + { .compatible = "renesas,r9a08g045-i3c" },
> + { .compatible = "renesas,r9a09g047-i3c" },
> { /* sentinel */ },
> };
> MODULE_DEVICE_TABLE(of, renesas_i3c_of_ids);
> --
> 2.43.0
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