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Message-ID: <1599cfd8-370b-4dec-5434-4845249c3533@loongson.cn>
Date: Wed, 31 Dec 2025 18:01:17 +0800
From: Bibo Mao <maobibo@...ngson.cn>
To: Huacai Chen <chenhuacai@...nel.org>
Cc: WANG Xuerui <kernel@...0n.name>, Tianrui Zhao <zhaotianrui@...ngson.cn>,
 loongarch@...ts.linux.dev, linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Subject: Re: [PATCH] LoongArch: KVM: Add more CPUCFG mask bit



On 2025/12/31 下午5:57, Huacai Chen wrote:
> Hi, Bibo,
> 
> On Wed, Dec 31, 2025 at 10:02 AM Bibo Mao <maobibo@...ngson.cn> wrote:
>>
>> With LA664 CPU there are more features supported which are indicated
>> in CPUCFG2 bit24:30 and CPUCFG3 bit17 and bit 23. These features do
>> not depend on KVM and there is no KVM exception when it is used in
>> VM mode.
>>
>> Here add more CPUCFG mask support with LA664 if VM is configured with
>> host CPU model.
>>
>> Signed-off-by: Bibo Mao <maobibo@...ngson.cn>
>> ---
>>   arch/loongarch/include/asm/loongarch.h |  7 +++++++
>>   arch/loongarch/kvm/vcpu.c              | 11 +++++++++++
>>   2 files changed, 18 insertions(+)
>>
>> diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
>> index e6b8ff61c8cc..553c4dc7a156 100644
>> --- a/arch/loongarch/include/asm/loongarch.h
>> +++ b/arch/loongarch/include/asm/loongarch.h
>> @@ -94,6 +94,12 @@
>>   #define  CPUCFG2_LSPW                  BIT(21)
>>   #define  CPUCFG2_LAM                   BIT(22)
>>   #define  CPUCFG2_PTW                   BIT(24)
>> +#define  CPUCFG2_FRECIPE               BIT(25)
>> +#define  CPUCFG2_DIV32                 BIT(26)
>> +#define  CPUCFG2_LAM_BH                        BIT(27)
>> +#define  CPUCFG2_LAMCAS                        BIT(28)
>> +#define  CPUCFG2_LLACQ_SCREL           BIT(29)
>> +#define  CPUCFG2_SCQ                   BIT(30)
>>
>>   #define LOONGARCH_CPUCFG3              0x3
>>   #define  CPUCFG3_CCDMA                 BIT(0)
>> @@ -108,6 +114,7 @@
>>   #define  CPUCFG3_SPW_HG_HF             BIT(11)
>>   #define  CPUCFG3_RVA                   BIT(12)
>>   #define  CPUCFG3_RVAMAX                        GENMASK(16, 13)
>> +#define  CPUCFG3_DBAR_HINTS            BIT(17)
>>   #define  CPUCFG3_ALDORDER_CAP          BIT(18) /* All address load ordered, capability */
>>   #define  CPUCFG3_ASTORDER_CAP          BIT(19) /* All address store ordered, capability */
>>   #define  CPUCFG3_ALDORDER_STA          BIT(20) /* All address load ordered, status */
> I applied the first part because it both needed by KVM and George's patch:
> https://lore.kernel.org/loongarch/20251231034523.47014-1-dongtai.guo@linux.dev/T/#u
ok, thanks.

I will rebase patch based on new version once the first part is merged.

Regards
Bibo Mao
> 
> Huacai
> 
>> diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c
>> index 656b954c1134..9d186004670c 100644
>> --- a/arch/loongarch/kvm/vcpu.c
>> +++ b/arch/loongarch/kvm/vcpu.c
>> @@ -652,6 +652,8 @@ static int _kvm_setcsr(struct kvm_vcpu *vcpu, unsigned int id, u64 val)
>>
>>   static int _kvm_get_cpucfg_mask(int id, u64 *v)
>>   {
>> +       unsigned int config;
>> +
>>          if (id < 0 || id >= KVM_MAX_CPUCFG_REGS)
>>                  return -EINVAL;
>>
>> @@ -684,9 +686,18 @@ static int _kvm_get_cpucfg_mask(int id, u64 *v)
>>                  if (cpu_has_ptw)
>>                          *v |= CPUCFG2_PTW;
>>
>> +               /*
>> +                * Some features depends on host and they are irrelative with
>> +                * KVM hypervisor
>> +                */
>> +               config = read_cpucfg(LOONGARCH_CPUCFG2);
>> +               *v |= config & (CPUCFG2_FRECIPE | CPUCFG2_DIV32 | CPUCFG2_LAM_BH);
>> +               *v |= config & (CPUCFG2_LAMCAS | CPUCFG2_LLACQ_SCREL | CPUCFG2_SCQ);
>>                  return 0;
>>          case LOONGARCH_CPUCFG3:
>>                  *v = GENMASK(16, 0);
>> +               config = read_cpucfg(LOONGARCH_CPUCFG3);
>> +               *v |= config & (CPUCFG3_DBAR_HINTS | CPUCFG3_SLDORDER_STA);
>>                  return 0;
>>          case LOONGARCH_CPUCFG4:
>>          case LOONGARCH_CPUCFG5:
>>
>> base-commit: dbf8fe85a16a33d6b6bd01f2bc606fc017771465
>> --
>> 2.39.3
>>
>>


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