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Message-ID: <CAHp75VdOX_h1Ksm4MbYyipiSpGrTp84GTkUAO9L_0o3auR3Xkg@mail.gmail.com>
Date: Wed, 31 Dec 2025 13:19:46 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: SeungJu Cheon <suunj1331@...il.com>
Cc: antoniu.miclaus@...log.com, lars@...afoo.de, Michael.Hennerich@...log.com,
jic23@...nel.org, andriy.shevchenko@...el.com, dlechner@...libre.com,
nuno.sa@...log.com, andy@...nel.org, linux-iio@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] iio:frequency:adf4377: Fix duplicated soft reset mask
On Tue, Dec 30, 2025 at 3:21 PM SeungJu Cheon <suunj1331@...il.com> wrote:
>
> The regmap_read_poll_timeout() uses ADF4377_0000_SOFT_RESET_R_MSK
> twice instead of checking both SOFT_RESET_MSK (bit 0) and
> SOFT_RESET_R_MSK (bit 7). This causes incomplete reset status check.
an incomplete
> Fix by using both masks as done in regmap_update_bits() above.
...
May I ask how you tested this? Logically from the code it sounds
correct, but I haven't read the datasheet yet, so I can't tell if this
is the expected value to read or not.
> return regmap_read_poll_timeout(st->regmap, 0x0, read_val,
> - !(read_val & (ADF4377_0000_SOFT_RESET_R_MSK |
> + !(read_val & (ADF4377_0000_SOFT_RESET_MSK |
> ADF4377_0000_SOFT_RESET_R_MSK)), 200, 200 * 100);
Okay, I opened the datasheet, and the below is what I read there. The
code first sets the SOFT_RESET_R and SOFT_RESET bits to "1", and waits
for them to be cleared. But the Table 43 does not mention that
SOFT_RESET_R is auto cleaned, and actually I don't see with a brief
look what the "repeat of" term means.
And for normal operation they needs to be 0ed as per:
"SOFT_RESET, SOFT_RESET_R, RST_SYS, and ADC_ST_CNV are the only
remaining RW bit fields not mentioned yet, and must also be set to
their POR state (see Table 34)."
With that said, I would wait for AD people to clarify the programming
workflow here.
--
With Best Regards,
Andy Shevchenko
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