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Message-ID: <fc175a68-84a3-4877-b96a-a3592139f7ca@mailbox.org>
Date: Wed, 31 Dec 2025 16:05:38 +0100
From: Marek Vasut <marek.vasut@...lbox.org>
To: Laurent Pinchart <laurent.pinchart@...asonboard.com>,
 David Laight <david.laight.linux@...il.com>
Cc: kernel test robot <lkp@...el.com>,
 Tomi Valkeinen <tomi.valkeinen@...asonboard.com>,
 oe-kbuild-all@...ts.linux.dev, linux-kernel@...r.kernel.org,
 "open list:MEDIA DRIVERS FOR RENESAS - FCP"
 <linux-renesas-soc@...r.kernel.org>
Subject: Re: include/linux/compiler_types.h:597:38: error: call to
 '__compiletime_assert_437' declared with attribute error: FIELD_PREP: value
 too large for the field

On 12/30/25 11:30 AM, Laurent Pinchart wrote:
> On Tue, Dec 30, 2025 at 03:47:17AM +0100, Marek Vasut wrote:
>> On 12/5/25 11:16 AM, kernel test robot wrote:
>>> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
>>> head:   2061f18ad76ecaddf8ed17df81b8611ea88dbddd
>>> commit: 4f716a1db661cfb31502a0a6d7e62c06daf2e603 drm/rcar-du: dsi: Convert register bitfields to GENMASK() macro
>>> date:   5 weeks ago
>>> config: arc-randconfig-001-20251205 (https://download.01.org/0day-ci/archive/20251205/202512051834.bESvhDiG-lkp@intel.com/config)
>>> compiler: arc-linux-gcc (GCC) 8.5.0
>>> reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251205/202512051834.bESvhDiG-lkp@intel.com/reproduce)
>>>
>>> If you fix the issue in a separate patch/commit (i.e. not just a new version of
>>> the same patch/commit), kindly add following tags
>>> | Reported-by: kernel test robot <lkp@...el.com>
>>> | Closes: https://lore.kernel.org/oe-kbuild-all/202512051834.bESvhDiG-lkp@intel.com/
>>>
>>> All errors (new ones prefixed by >>):
>>>
>>>      In file included from <command-line>:
>>>      drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c: In function 'rcar_mipi_dsi_startup.isra.4':
>>>>> include/linux/compiler_types.h:597:38: error: call to '__compiletime_assert_437' declared with attribute error: FIELD_PREP: value too large for the field
>>
>> [...]
>>
>>>      rcar_mipi_dsi.c:660:14: note: in expansion of macro 'VCLKSET_DIV_V4H'
>>>         vclkset |= VCLKSET_DIV_V4H(__ffs(setup_info.vclk_divider) - 1);
>>>                    ^~~~~~~~~~~~~~~
>> I don't think this condition can occur.
>>
>> In drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c :
>> - rcar_mipi_dsi_startup() calls rcar_mipi_dsi_parameters_calc() which is
>> the only site that assigns setup_info.vclk_divider this way:
>>
>>    415         switch (dsi->info->model) {
>>    416         case RCAR_DSI_V3U:
>>    417         default:
>>    418                 setup_info->vclk_divider = 1 << ((clk_cfg->vco_cntrl >> 4) & 0x3);
>>    419                 break;
>>    420
>>    421         case RCAR_DSI_V4H:
>>    422                 setup_info->vclk_divider = 1 << (((clk_cfg->vco_cntrl >> 3) & 0x7) + 1);
>>    423                 break;
>>    424         }
>>
>> In case of V3U, vclk_divider is 1 << (0..3) .
>> In case of V4H, vclk_divider is 1 << (1..8) .
>>
>> In drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c :
>> - rcar_mipi_dsi_startup() later contains the offending code:
>>
>>    653         switch (dsi->info->model) {
>>    654         case RCAR_DSI_V3U:
>>    655         default:
>>    656                 vclkset |= VCLKSET_DIV_V3U(__ffs(setup_info.vclk_divider));
>>    657                 break;
>>    658
>>    659         case RCAR_DSI_V4H:
>>    660                 vclkset |= VCLKSET_DIV_V4H(__ffs(setup_info.vclk_divider) - 1);
>>    661                 break;
>>    662         }
>>
>> This does the reverse of the code that assigned the value above, so:
>>
>> In case of V3U, field value is (0..3) .
>> In case of V4H, field value is (0..7) .
>>
>> Finally in drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h :
>>
>> 256 #define VCLKSET_DIV_V3U_MASK            GENMASK_U32(5, 4)
>> 257 #define VCLKSET_DIV_V3U(n)
>> FIELD_PREP(VCLKSET_DIV_V3U_MASK, (n))
>> 258 #define VCLKSET_DIV_V4H_MASK            GENMASK_U32(6, 4)
>> 259 #define VCLKSET_DIV_V4H(n)
>> FIELD_PREP(VCLKSET_DIV_V4H_MASK, (n))
>>
>> The masks fit exactly. For V3U the mask is 2-bit, or V4H the mask is 3-bit .
>>
>> ...
>>
>> I can however rewrite the code in this way, which should also mitigate
>> this warning. Do you think this makes the code any better ?
> 
> The datasheet says that the VCLKSET.DIV field "should be same as the
> CLOCKSET2.vco_cntrl[5:3]". The change below makes this explicit, which
> may not be a bad thing, even if it duplicates the small calculation.
I believe the following rework should address the duplication concern too:

https://lore.kernel.org/dri-devel/20251231145712.60816-1-marek.vasut+renesas@mailbox.org/

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