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Message-ID: <176734667476.18460.9284868116497170222.b4-ty@oss.qualcomm.com>
Date: Fri,  2 Jan 2026 10:37:58 +0100
From: Bartosz Golaszewski <bartosz.golaszewski@....qualcomm.com>
To: Linus Walleij <linusw@...nel.org>, Bartosz Golaszewski <brgl@...ev.pl>,
        Mark Tomlinson <mark.tomlinson@...iedtelesis.co.nz>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Ernest Van Hoecke <ernestvanhoecke@...il.com>
Cc: Bartosz Golaszewski <bartosz.golaszewski@....qualcomm.com>,
        Ernest Van Hoecke <ernest.vanhoecke@...adex.com>,
        Emanuele Ghidoli <emanuele.ghidoli@...adex.com>,
        Francesco Dolcini <francesco.dolcini@...adex.com>,
        lakabd <lakabd.work@...il.com>, Yong Li <yong.b.li@...el.com>,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1] gpio: pca953x: handle short interrupt pulses on PCAL devices


On Wed, 17 Dec 2025 16:30:25 +0100, Ernest Van Hoecke wrote:
> GPIO drivers with latch input support may miss short pulses on input
> pins even when input latching is enabled. The generic interrupt logic in
> the pca953x driver reports interrupts by comparing the current input
> value against the previously sampled one and only signals an event when
> a level change is observed between two reads.
> 
> For short pulses, the first edge is captured when the input register is
> read, but if the signal returns to its previous level before the read,
> the second edge is not observed. As a result, successive pulses can
> produce identical input values at read time and no level change is
> detected, causing interrupts to be missed. Below timing diagram shows
> this situation where the top signal is the input pin level and the
> bottom signal indicates the latched value.
> 
> [...]

Applied, thanks!

[1/1] gpio: pca953x: handle short interrupt pulses on PCAL devices
      commit: 014a17deb41201449f76df2b20c857a9c3294a7c

Best regards,
-- 
Bartosz Golaszewski <bartosz.golaszewski@....qualcomm.com>

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