linux-kernel - [PATCH 0/2] pinctrl: qcom: Add Mahua TLMM support

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Message-Id: <20260102-pinctrl-qcom-mahua-tlmm-v1-0-0edd71af08b2@oss.qualcomm.com>
Date: Fri, 02 Jan 2026 03:07:53 -0800
From: Gopikrishna Garmidi <gopikrishna.garmidi@....qualcomm.com>
To: Bjorn Andersson <andersson@...nel.org>, Linus Walleij <linusw@...nel.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Rajendra Nayak <rajendra.nayak@....qualcomm.com>,
        Pankaj Patil <pankaj.patil@....qualcomm.com>,
        Sibi Sankar <sibi.sankar@....qualcomm.com>
Cc: Bjorn Andersson <bjorn.andersson@....qualcomm.com>,
        linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Gopikrishna Garmidi <gopikrishna.garmidi@....qualcomm.com>
Subject: [PATCH 0/2] pinctrl: qcom: Add Mahua TLMM support

Introduce Top Level Mode Multiplexer support for Mahua, a 12-core
variant of Qualcomm's Glymur compute SoC.

Mahua shares the same pin configuration and GPIO layout as Glymur 
but requires different PDC (Power Domain Controller) wake IRQ
mappings for proper wake-up functionality.

Changes:
- Add DeviceTree bindings for Mahua SoC TLMM block
- Add mahua_pdc_map[] with Mahua-specific GPIO to PDC IRQ mappings
- Add mahua tlmm soc data
- Enable probe time config selection based on the compatible string

Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@....qualcomm.com>
---
Gopikrishna Garmidi (2):
      dt-bindings: pinctrl: Add Mahua TLMM support
      pinctrl: qcom: glymur: Add Mahua TLMM support

 .../bindings/pinctrl/qcom,glymur-tlmm.yaml         |  6 ++-
 drivers/pinctrl/qcom/pinctrl-glymur.c              | 43 ++++++++++++++++++++--
 2 files changed, 44 insertions(+), 5 deletions(-)
---
base-commit: cc3aa43b44bdb43dfbac0fcb51c56594a11338a8
change-id: 20260102-pinctrl-qcom-mahua-tlmm-433644bae64c

Best regards,
-- 
Gopikrishna Garmidi <gopikrishna.garmidi@....qualcomm.com>