linux-kernel - Re: [PATCH v1 1/3] arm64: dts: rockchip: rk3588-rock-5b-5bp-5t: Correct Type-C pin bias settings

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <aVke1kQnHJLqWGHi@venus>
Date: Sat, 3 Jan 2026 14:52:50 +0100
From: Sebastian Reichel <sebastian.reichel@...labora.com>
To: Anand Moon <linux.amoon@...il.com>
Cc: Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Heiko Stuebner <heiko@...ech.de>, Heikki Krogerus <heikki.krogerus@...ux.intel.com>, 
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Nicolas Frattaroli <nicolas.frattaroli@...labora.com>, 
	FUKAUMI Naoki <naoki@...xa.com>, Diederik de Haas <didi.debian@...ow.org>, 
	Yongbo Zhang <giraffesnn123@...il.com>, 
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>, 
	"moderated list:ARM/Rockchip SoC support" <linux-arm-kernel@...ts.infradead.org>, 
	"open list:ARM/Rockchip SoC support" <linux-rockchip@...ts.infradead.org>, open list <linux-kernel@...r.kernel.org>, 
	"open list:USB TYPEC CLASS" <linux-usb@...r.kernel.org>
Subject: Re: [PATCH v1 1/3] arm64: dts: rockchip: rk3588-rock-5b-5bp-5t:
 Correct Type-C pin bias settings

Hi,

On Sat, Jan 03, 2026 at 02:01:17PM +0530, Anand Moon wrote:
> As pre FUSB302 datasheet interrupt line (INT_N) is an open-drain,
> active-low signal. It requires a pull-up resistor to maintain a stable
> high state when deasserted. Similarly, the TYPEC5V_PWREN_H enable signal
> requires a pull-down resistor to ensure it defaults to a low state,
> preventing unintended power delivery during the boot sequence.
> 
> Update the pinctrl entries to use pcfg_pull_up for usbc0_int and
> pcfg_pull_down for vbus5v0_typec_en to align with the hardware's
> electrical requirements.
> 
> Cc: Sebastian Reichel <sebastian.reichel@...labora.com>
> Fixes: 67b2c15d8fb3 ("arm64: dts: rockchip: add USB-C support for ROCK 5B/5B+/5T")
> Signed-off-by: Anand Moon <linux.amoon@...il.com>
> ---
> v1: As per the shematics CC_INT_L interrupt pin is GPIO3_B4_u
>     As per the shematics TYPEC5V_PWREN_H pin is GPIO2_B6_d
> ---

Checking the schematics:

5B v1.45 - CC_INT_L - R2613 10K pull-up resistor
5B v1.45 - TYPEC5V_PWREN_H - GPIO is effectively unused because R95035 is NC

5B+ v1.2 - CC_INT_L - R2613 10K pull-up resistor
5B+ v1.2 - TYPEC5V_PWREN_H - R163 100K pull-down resistor

5T v1.2 - CC_INT_L - R2613 10K pull-up resistor
5T v1.2 - TYPEC5V_PWREN_H - R163 100K pull-down resistor

TLDR: All GPIOs have pull resistors in discrete hardware and do not
need them muxed in the SoC.

Greetings,

-- Sebastian

>  arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
> index b3e76ad2d869..0cd8ac7bf538 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
> @@ -537,11 +537,11 @@ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
>  
>  	usb {
>  		usbc0_int: usbc0-int {
> -			rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
> +			rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
>  		};
>  
>  		vbus5v0_typec_en: vbus5v0-typec-en {
> -			rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
> +			rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
>  		};
>  	};
>  };
> -- 
> 2.50.1
> 

Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)