linux-kernel - Re: [PATCH] PCI: j721e: Add config guards for Cadence Host and Endpoint library APIs

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Message-ID: <e88b31c6716a80e35952faed9484e6702db5a39f.camel@ti.com>
Date: Sun, 4 Jan 2026 12:09:34 +0530
From: Siddharth Vadapalli <s-vadapalli@...com>
To: Bjorn Helgaas <helgaas@...nel.org>
CC: <vigneshr@...com>, <lpieralisi@...nel.org>, <kwilczynski@...nel.org>,
	<mani@...nel.org>, <robh@...nel.org>, <bhelgaas@...gle.com>, <arnd@...db.de>,
	<kishon@...nel.org>, <stable@...r.kernel.org>, <linux-omap@...r.kernel.org>,
	<linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>, <srk@...com>, <s-vadapalli@...com>
Subject: Re: [PATCH] PCI: j721e: Add config guards for Cadence Host and
 Endpoint library APIs

On Fri, 2025-12-26 at 11:19 -0600, Bjorn Helgaas wrote:

Hello Bjorn,

> On Mon, Nov 17, 2025 at 05:02:06PM +0530, Siddharth Vadapalli wrote:
> > Commit under Fixes enabled loadable module support for the driver under
> > the assumption that it shall be the sole user of the Cadence Host and
> > Endpoint library APIs. This assumption guarantees that we won't end up
> > in a case where the driver is built-in and the library support is built
> > as a loadable module.
> > 
> > With the introduction of [1], this assumption is no longer valid. The
> > SG2042 driver could be built as a loadable module, implying that the
> > Cadence Host library is also selected as a loadable module. However, the
> > pci-j721e.c driver could be built-in as indicated by CONFIG_PCI_J721E=y
> > due to which the Cadence Endpoint library is built-in. Despite the
> > library drivers being built as specified by their respective consumers,
> > since the 'pci-j721e.c' driver has references to the Cadence Host
> > library APIs as well, we run into a build error as reported at [0].
> > 
> > Fix this by adding config guards as a temporary workaround. The proper
> > fix is to split the 'pci-j721e.c' driver into independent Host and
> > Endpoint drivers as aligned at [2].
> 
> If we know what the proper fix is, why aren't we just doing that
> instead of adding a temporary workaround?

The issue appeared (was discovered) since commit [1] mentioned below. After
the issue was reported, and given the severity of the issue (build failure
[0] below), refactoring the driver in the short time frame (issue was
reported close to the end of the merge window) didn't seem feasible.
Therefore, the temporary workaround was posted to address the issue
quickly. I will be posting a series to refactor the driver in a few weeks.

> 
> > Fixes: a2790bf81f0f ("PCI: j721e: Add support to build as a loadable module")
> > Reported-by: kernel test robot <lkp@...el.com>
> > Closes: https://lore.kernel.org/oe-kbuild-all/202511111705.MZ7ls8Hm-lkp@intel.com/
> > Cc: <stable@...r.kernel.org>
> > [0]: https://lore.kernel.org/r/202511111705.MZ7ls8Hm-lkp@intel.com/
> > [1]: commit 1c72774df028 ("PCI: sg2042: Add Sophgo SG2042 PCIe driver")
> > [2]: https://lore.kernel.org/r/37f6f8ce-12b2-44ee-a94c-f21b29c98821@app.fastmail.com/
> > Suggested-by: Arnd Bergmann <arnd@...db.de>
> > Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>
> > ---
> >  drivers/pci/controller/cadence/pci-j721e.c | 43 +++++++++++++---------
> >  1 file changed, 26 insertions(+), 17 deletions(-)

[TRIMMED]

Regards,
Siddharth.