linux-kernel - Re: [PATCH V2 10/13] perf/x86/intel/uncore: Update DMR uncore constraints preliminarily

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Message-ID: <496ac441-b8bf-44a4-a0de-d6e046f20a16@linux.intel.com>
Date: Sun, 4 Jan 2026 10:41:02 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Zide Chen <zide.chen@...el.com>, Peter Zijlstra <peterz@...radead.org>,
 Ingo Molnar <mingo@...hat.com>, Arnaldo Carvalho de Melo <acme@...nel.org>,
 Namhyung Kim <namhyung@...nel.org>, Ian Rogers <irogers@...gle.com>,
 Adrian Hunter <adrian.hunter@...el.com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Andi Kleen <ak@...ux.intel.com>, Eranian Stephane <eranian@...gle.com>
Cc: linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
 Xudong Hao <xudong.hao@...el.com>, Falcon Thomas <thomas.falcon@...el.com>
Subject: Re: [PATCH V2 10/13] perf/x86/intel/uncore: Update DMR uncore
 constraints preliminarily


On 1/1/2026 6:42 AM, Zide Chen wrote:
> Update event constraints base on the latest DMR uncore event list.
>
> Signed-off-by: Zide Chen <zide.chen@...el.com>
> ---
> V2:
> - make use of the new UNCORE_EVENT_CONSTRAINT_RANGE
>
>  arch/x86/events/intel/uncore_snbep.c | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>
> diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
> index fac2be780276..3f96fcc8562b 100644
> --- a/arch/x86/events/intel/uncore_snbep.c
> +++ b/arch/x86/events/intel/uncore_snbep.c
> @@ -6660,10 +6660,19 @@ static const struct attribute_group dmr_cxlcm_uncore_format_group = {
>  	.attrs = dmr_cxlcm_uncore_formats_attr,
>  };
>  
> +static struct event_constraint dmr_uncore_cxlcm_constraints[] = {
> +	UNCORE_EVENT_CONSTRAINT_RANGE(0x1, 0x24, 0x0f),
> +	UNCORE_EVENT_CONSTRAINT_RANGE(0x41, 0x41, 0xf0),
> +	UNCORE_EVENT_CONSTRAINT_RANGE(0x50, 0x5e, 0xf0),
> +	UNCORE_EVENT_CONSTRAINT_RANGE(0x60, 0x61, 0xf0),
> +	EVENT_CONSTRAINT_END
> +};
> +
>  static struct intel_uncore_type dmr_uncore_cxlcm = {
>  	.name			= "cxlcm",
>  	.event_mask		= GENERIC_PMON_RAW_EVENT_MASK,
>  	.event_mask_ext		= DMR_CXLCM_EVENT_MASK_EXT,
> +	.constraints		= dmr_uncore_cxlcm_constraints,
>  	.format_group		= &dmr_cxlcm_uncore_format_group,
>  	.attr_update		= uncore_alias_groups,
>  };
> @@ -6675,9 +6684,20 @@ static struct intel_uncore_type dmr_uncore_hamvf = {
>  	.attr_update		= uncore_alias_groups,
>  };
>  
> +static struct event_constraint dmr_uncore_cbo_constraints[] = {
> +	UNCORE_EVENT_CONSTRAINT(0x11, 0x1),
> +	UNCORE_EVENT_CONSTRAINT_RANGE(0x19, 0x1a, 0x1),
> +	UNCORE_EVENT_CONSTRAINT(0x1f, 0x1),
> +	UNCORE_EVENT_CONSTRAINT(0x21, 0x1),
> +	UNCORE_EVENT_CONSTRAINT(0x25, 0x1),
> +	UNCORE_EVENT_CONSTRAINT(0x36, 0x1),
> +	EVENT_CONSTRAINT_END
> +};
> +
>  static struct intel_uncore_type dmr_uncore_cbo = {
>  	.name			= "cbo",
>  	.event_mask_ext		= DMR_HAMVF_EVENT_MASK_EXT,
> +	.constraints            = dmr_uncore_cbo_constraints,
>  	.format_group		= &dmr_sca_uncore_format_group,
>  	.attr_update		= uncore_alias_groups,
>  };
> @@ -6711,9 +6731,16 @@ static struct intel_uncore_type dmr_uncore_dda = {
>  	.attr_update		= uncore_alias_groups,
>  };
>  
> +static struct event_constraint dmr_uncore_sbo_constraints[] = {
> +	UNCORE_EVENT_CONSTRAINT(0x1f, 0x01),
> +	UNCORE_EVENT_CONSTRAINT(0x25, 0x01),
> +	EVENT_CONSTRAINT_END
> +};
> +
>  static struct intel_uncore_type dmr_uncore_sbo = {
>  	.name			= "sbo",
>  	.event_mask_ext		= DMR_HAMVF_EVENT_MASK_EXT,
> +	.constraints		= dmr_uncore_sbo_constraints,
>  	.format_group		= &dmr_sca_uncore_format_group,
>  	.attr_update		= uncore_alias_groups,
>  };

Reviewed-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>