linux-kernel - Re: [PATCH RFC] arm64: dts: qcom: x1e80100: Fix USB combo PHYs SS1 and SS2 ref clocks

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Message-ID: <176762206421.2923194.528670029626982446.b4-ty@kernel.org>
Date: Mon,  5 Jan 2026 08:07:09 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Konrad Dybcio <konradybcio@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Rajendra Nayak <quic_rjendra@...cinc.com>,
	Sibi Sankar <sibi.sankar@....qualcomm.com>,
	Abel Vesa <abelvesa@...nel.org>
Cc: Taniya Das <taniya.das@....qualcomm.com>,
	Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
	linux-arm-msm@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH RFC] arm64: dts: qcom: x1e80100: Fix USB combo PHYs SS1 and SS2 ref clocks


On Mon, 03 Nov 2025 18:51:40 +0200, Abel Vesa wrote:
> It seems the USB combo SS1 and SS2 ref clocks have another gate, unlike
> the SS0. These gates are part of the TCSR clock controller.
> 
> At least on Dell XPS 13 (9345), if the ref clock provided by the TCSR
> clock controller for SS1 PHY is disabled on the clk_disable_unused late
> initcall, the PHY fails to initialize. It doesn't happen on the SS0 PHY
> and the SS2 is not used on this device.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: x1e80100: Fix USB combo PHYs SS1 and SS2 ref clocks
      commit: 3af51501e2b8c87564b5cda43b0e5c316cf54717

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>