linux-kernel - Re: [PATCH] arm64: dts: rockchip: Fix wrong register range of rk3576 gpu

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Message-ID: <3395202.44csPzL39Z@workhorse>
Date: Mon, 05 Jan 2026 09:13:11 +0100
From: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
 Chaoyi Chen <chaoyi.chen@...k-chips.com>,
 Kever Yang <kever.yang@...k-chips.com>,
 Sebastian Reichel <sebastian.reichel@...labora.com>,
 Cristian Ciocaltea <cristian.ciocaltea@...labora.com>,
 Frank Wang <frank.wang@...k-chips.com>, Alexey Charkov <alchark@...il.com>,
 Liang Chen <cl@...k-chips.com>, Finley Xiao <finley.xiao@...k-chips.com>,
 Elaine Zhang <zhangqing@...k-chips.com>,
 Yifeng Zhao <yifeng.zhao@...k-chips.com>,
 Chaoyi Chen <chaoyi.chen@...k-chips.com>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject:
 Re: [PATCH] arm64: dts: rockchip: Fix wrong register range of rk3576 gpu

On Monday, 5 January 2026 09:12:00 Central European Standard Time Chaoyi Chen wrote:
> Hello Nicolas,
> 
> On 1/5/2026 3:55 PM, Nicolas Frattaroli wrote:
> > On Tuesday, 30 December 2025 10:02:46 Central European Standard Time Chaoyi Chen wrote:
> >> From: Chaoyi Chen <chaoyi.chen@...k-chips.com>
> >>
> >> According to RK3576 TRM part1 page13, the size of the GPU registers
> >> is 128 KB.
> >>
> >> Fixes: 57b1ce903966 ("arm64: dts: rockchip: Add rk3576 SoC base DT")
> >> Signed-off-by: Chaoyi Chen <chaoyi.chen@...k-chips.com>
> >> ---
> >>  arch/arm64/boot/dts/rockchip/rk3576.dtsi | 2 +-
> >>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> >> index 6284e7bdc442..b375015f0662 100644
> >> --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> >> +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> >> @@ -1271,7 +1271,7 @@ power-domain@...576_PD_VO1 {
> >>  
> >>  		gpu: gpu@...00000 {
> >>  			compatible = "rockchip,rk3576-mali", "arm,mali-bifrost";
> >> -			reg = <0x0 0x27800000 0x0 0x200000>;
> >> +			reg = <0x0 0x27800000 0x0 0x20000>;
> >>  			assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
> >>  			assigned-clock-rates = <198000000>;
> >>  			clocks = <&cru CLK_GPU>;
> >>
> > 
> > This is only true if you only consider the GPU_CONTROL and
> > JOB_CONTROL register ranges, and leave out the MMU_STAGE1
> > and MMU_STAGE2 ranges. I don't know if those need to be
> > mapped, since the MMU control registers are < 0x2000.
> > 
> > What do other bifrost devices do?
> > 
> 
> I don't quite understand your point. And this size is 0x20000,
> not 0x2000. Before the change it was 0x200000, which overlaps the
> address space of some hardware that comes after it like JPEG. 
> 
> Could you explain it again? Thank you.

Oops, I misread. You are correct, there's one too many zeroes,
and I thought you removed one too many. :)

Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>

> 
> > Kind regards,
> > Nicolas Frattaroli
> > 
> > 
> > 
> 
>