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Message-ID:
<SA1PR12MB8120F3D5F2EC5CFF8BAE8DCC9586A@SA1PR12MB8120.namprd12.prod.outlook.com>
Date: Mon, 5 Jan 2026 10:35:34 +0000
From: "Verma, Devendra" <Devendra.Verma@....com>
To: Vinod Koul <vkoul@...nel.org>
CC: "bhelgaas@...gle.com" <bhelgaas@...gle.com>, "mani@...nel.org"
<mani@...nel.org>, "dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "Simek,
Michal" <michal.simek@....com>, "Verma, Devendra" <Devendra.Verma@....com>
Subject: RE: [PATCH v7 2/2] dmaengine: dw-edma: Add non-LL mode
[AMD Official Use Only - AMD Internal Distribution Only]
> -----Original Message-----
> From: Vinod Koul <vkoul@...nel.org>
> Sent: Tuesday, December 16, 2025 6:02 PM
> To: Verma, Devendra <Devendra.Verma@....com>
> Cc: bhelgaas@...gle.com; mani@...nel.org; dmaengine@...r.kernel.org;
> linux-pci@...r.kernel.org; linux-kernel@...r.kernel.org; Simek, Michal
> <michal.simek@....com>
> Subject: Re: [PATCH v7 2/2] dmaengine: dw-edma: Add non-LL mode
>
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
>
>
> On 12-12-25, 17:50, Devendra K Verma wrote:
> > AMD MDB IP supports Linked List (LL) mode as well as non-LL mode.
> > The current code does not have the mechanisms to enable the DMA
> > transactions using the non-LL mode. The following two cases are added
> > with this patch:
> > - For the AMD (Xilinx) only, when a valid physical base address of
> > the device side DDR is not configured, then the IP can still be
> > used in non-LL mode. For all the channels DMA transactions will
> > be using the non-LL mode only. This, the default non-LL mode,
> > is not applicable for Synopsys IP with the current code addition.
> >
> > - If the default mode is LL-mode, for both AMD (Xilinx) and Synosys,
> > and if user wants to use non-LL mode then user can do so via
> > configuring the peripheral_config param of dma_slave_config.
> >
> > Signed-off-by: Devendra K Verma <devendra.verma@....com>
> > ---
> > Changes in v7
> > No change
> >
> > Changes in v6
> > Gave definition to bits used for channel configuration.
> > Removed the comment related to doorbell.
> >
> > Changes in v5
> > Variable name 'nollp' changed to 'non_ll'.
> > In the dw_edma_device_config() WARN_ON replaced with dev_err().
> > Comments follow the 80-column guideline.
> >
> > Changes in v4
> > No change
> >
> > Changes in v3
> > No change
> >
> > Changes in v2
> > Reverted the function return type to u64 for
> > dw_edma_get_phys_addr().
> >
> > Changes in v1
> > Changed the function return type for dw_edma_get_phys_addr().
> > Corrected the typo raised in review.
> > ---
> > drivers/dma/dw-edma/dw-edma-core.c | 41 ++++++++++++++++++++---
> > drivers/dma/dw-edma/dw-edma-core.h | 1 +
> > drivers/dma/dw-edma/dw-edma-pcie.c | 44 +++++++++++++++++--------
> > drivers/dma/dw-edma/dw-hdma-v0-core.c | 61
> > ++++++++++++++++++++++++++++++++++-
> > drivers/dma/dw-edma/dw-hdma-v0-regs.h | 1 +
> > include/linux/dma/edma.h | 1 +
> > 6 files changed, 130 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/dma/dw-edma/dw-edma-core.c
> > b/drivers/dma/dw-edma/dw-edma-core.c
> > index b43255f..60a3279 100644
> > --- a/drivers/dma/dw-edma/dw-edma-core.c
> > +++ b/drivers/dma/dw-edma/dw-edma-core.c
> > @@ -223,8 +223,31 @@ static int dw_edma_device_config(struct
> dma_chan *dchan,
> > struct dma_slave_config *config) {
> > struct dw_edma_chan *chan = dchan2dw_edma_chan(dchan);
> > + int non_ll = 0;
> > +
> > + if (config->peripheral_config &&
> > + config->peripheral_size != sizeof(int)) {
> > + dev_err(dchan->device->dev,
> > + "config param peripheral size mismatch\n");
> > + return -EINVAL;
> > + }
>
> Hmm, what is this config param used for. I dont like people using this in
> opaque manner. Can you explain why this needs to be passed from client.
> What does non ll mean and how would client decide to use this or not..?
>
> --
> ~Vinod
The above statement can be better structured as following:
int *non_ll = (int *) config->peripheral_config;
With this it shall be clear that peripheral_config is being used for
referencing an int type object instead of dereferencing it directly.
For Xilinx only, non-LL use case becomes necessity when the physical address
of the device side DDR is not available or configured via VSEC.
With non-LL source code addition, the controller is still usable unlike the LL
mode scenario.
If non-LL source code is available, then this simple config gives the
flexibility to use the controller in non-LL mode when LL mode is
enabled by default. This config is applicable for both Xilinx and Synosys.
The dma-client can provide the inputs via peripheral_config param of
dma_slave_config struct. If dma-client configures without any
peripheral_config as inputs then the default mode would be LL mode only.
With the non-LL mode, following are the advantages:
- Non-LL gives flexibility to utilize the device side memory which is being
reserved for link-lists for read / write channels.
- DMA transfer performance is better with non-LL mode for single big chunk
than it is for LL mode.
This simple addition gives the flexibility to use the modes depending upon the
client use-case without any effect on the existing LL mode functionality.
Regards,
Devendra
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