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Message-ID:
<TY3PR01MB11346F08CE5CFDFD010A58C9D8686A@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Mon, 5 Jan 2026 10:53:29 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>, Tommaso Merciai
<tomm.merciai@...il.com>
CC: "linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
wsa+renesas <wsa+renesas@...g-engineering.com>, Alexandre Belloni
<alexandre.belloni@...tlin.com>, Frank Li <Frank.Li@....com>, Philipp Zabel
<p.zabel@...gutronix.de>, Geert Uytterhoeven <geert+renesas@...der.be>,
magnus.damm <magnus.damm@...il.com>, "linux-i3c@...ts.infradead.org"
<linux-i3c@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v4 2/4] i3c: renesas: Store clock rate and reset controls
in struct renesas_i3c
Hi Tommaso Merciai,
> -----Original Message-----
> From: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
> Sent: 05 January 2026 10:50
> Subject: [PATCH v4 2/4] i3c: renesas: Store clock rate and reset controls in struct renesas_i3c
>
> Update the struct renesas_i3c to store the clock rate, presetn and tresetn handlers. Replace local
> usage of the clock rate and reset controls with these structure fields.
>
> Simplify the code and prepare the driver for upcoming suspend/resume support.
>
> No functional change intended.
>
> Reviewed-by: Frank Li <Frank.Li@....com>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
> ---
> v3->v4:
> - No changes.
>
> v2->v3:
> - Collected FLi tag.
> - Improved commit body.
>
> v1->v2:
> - New patch.
>
> drivers/i3c/master/renesas-i3c.c | 39 ++++++++++++++++----------------
> 1 file changed, 20 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-i3c.c
> index 1b8f4be9ad67..7359f71f78dd 100644
> --- a/drivers/i3c/master/renesas-i3c.c
> +++ b/drivers/i3c/master/renesas-i3c.c
> @@ -258,11 +258,14 @@ struct renesas_i3c {
> u32 free_pos;
> u32 i2c_STDBR;
> u32 i3c_STDBR;
> + unsigned long rate;
> u8 addrs[RENESAS_I3C_MAX_DEVS];
> struct renesas_i3c_xferqueue xferqueue;
> void __iomem *regs;
> struct clk_bulk_data *clks;
> u8 num_clks;
> + struct reset_control *presetn;
> + struct reset_control *tresetn;
Can this be above num_clks to avoid padding?
Cheers,
Biju
> };
>
> struct renesas_i3c_i2c_dev_data {
> @@ -482,22 +485,21 @@ static int renesas_i3c_bus_init(struct i3c_master_controller *m)
> struct i3c_bus *bus = i3c_master_get_bus(m);
> struct i3c_device_info info = {};
> struct i2c_timings t;
> - unsigned long rate;
> u32 double_SBR, val;
> int cks, pp_high_ticks, pp_low_ticks, i3c_total_ticks;
> int od_high_ticks, od_low_ticks, i2c_total_ticks;
> int ret;
>
> - rate = clk_get_rate(i3c->clks[RENESAS_I3C_TCLK_IDX].clk);
> - if (!rate)
> + i3c->rate = clk_get_rate(i3c->clks[RENESAS_I3C_TCLK_IDX].clk);
> + if (!i3c->rate)
> return -EINVAL;
>
> ret = renesas_i3c_reset(i3c);
> if (ret)
> return ret;
>
> - i2c_total_ticks = DIV_ROUND_UP(rate, bus->scl_rate.i2c);
> - i3c_total_ticks = DIV_ROUND_UP(rate, bus->scl_rate.i3c);
> + i2c_total_ticks = DIV_ROUND_UP(i3c->rate, bus->scl_rate.i2c);
> + i3c_total_ticks = DIV_ROUND_UP(i3c->rate, bus->scl_rate.i3c);
>
> i2c_parse_fw_timings(&m->dev, &t, true);
>
> @@ -510,7 +512,7 @@ static int renesas_i3c_bus_init(struct i3c_master_controller *m)
> pp_high_ticks = ((i3c_total_ticks * 5) / 10);
> else
> pp_high_ticks = DIV_ROUND_UP(I3C_BUS_THIGH_MIXED_MAX_NS,
> - NSEC_PER_SEC / rate);
> + NSEC_PER_SEC / i3c->rate);
> pp_low_ticks = i3c_total_ticks - pp_high_ticks;
>
> if ((od_low_ticks / 2) <= 0xFF && pp_low_ticks < 0x3F) @@ -518,7 +520,7 @@ static int
> renesas_i3c_bus_init(struct i3c_master_controller *m)
>
> i2c_total_ticks /= 2;
> i3c_total_ticks /= 2;
> - rate /= 2;
> + i3c->rate /= 2;
> }
>
> /* SCL clock period calculation in Open-drain mode */ @@ -539,8 +541,8 @@ static int
> renesas_i3c_bus_init(struct i3c_master_controller *m)
> STDBR_SBRLP(pp_low_ticks) |
> STDBR_SBRHP(pp_high_ticks);
>
> - od_low_ticks -= t.scl_fall_ns / (NSEC_PER_SEC / rate) + 1;
> - od_high_ticks -= t.scl_rise_ns / (NSEC_PER_SEC / rate) + 1;
> + od_low_ticks -= t.scl_fall_ns / (NSEC_PER_SEC / i3c->rate) + 1;
> + od_high_ticks -= t.scl_rise_ns / (NSEC_PER_SEC / i3c->rate) + 1;
> i3c->i2c_STDBR = (double_SBR ? STDBR_DSBRPO : 0) |
> STDBR_SBRLO(double_SBR, od_low_ticks) |
> STDBR_SBRHO(double_SBR, od_high_ticks) | @@ -591,13 +593,13 @@ static int
> renesas_i3c_bus_init(struct i3c_master_controller *m)
> renesas_set_bit(i3c->regs, SCSTRCTL, SCSTRCTL_ACKTWE);
>
> /* Bus condition timing */
> - val = DIV_ROUND_UP(I3C_BUS_TBUF_MIXED_FM_MIN_NS, NSEC_PER_SEC / rate);
> + val = DIV_ROUND_UP(I3C_BUS_TBUF_MIXED_FM_MIN_NS, NSEC_PER_SEC /
> +i3c->rate);
> renesas_writel(i3c->regs, BFRECDT, BFRECDT_FRECYC(val));
>
> - val = DIV_ROUND_UP(I3C_BUS_TAVAL_MIN_NS, NSEC_PER_SEC / rate);
> + val = DIV_ROUND_UP(I3C_BUS_TAVAL_MIN_NS, NSEC_PER_SEC / i3c->rate);
> renesas_writel(i3c->regs, BAVLCDT, BAVLCDT_AVLCYC(val));
>
> - val = DIV_ROUND_UP(I3C_BUS_TIDLE_MIN_NS, NSEC_PER_SEC / rate);
> + val = DIV_ROUND_UP(I3C_BUS_TIDLE_MIN_NS, NSEC_PER_SEC / i3c->rate);
> renesas_writel(i3c->regs, BIDLCDT, BIDLCDT_IDLCYC(val));
>
> ret = i3c_master_get_free_addr(m, 0);
> @@ -1300,7 +1302,6 @@ static const struct renesas_i3c_irq_desc renesas_i3c_irqs[] = { static int
> renesas_i3c_probe(struct platform_device *pdev) {
> struct renesas_i3c *i3c;
> - struct reset_control *reset;
> int ret, i;
>
> i3c = devm_kzalloc(&pdev->dev, sizeof(*i3c), GFP_KERNEL); @@ -1317,14 +1318,14 @@ static int
> renesas_i3c_probe(struct platform_device *pdev)
>
> i3c->num_clks = ret;
>
> - reset = devm_reset_control_get_optional_exclusive_deasserted(&pdev->dev, "tresetn");
> - if (IS_ERR(reset))
> - return dev_err_probe(&pdev->dev, PTR_ERR(reset),
> + i3c->tresetn = devm_reset_control_get_optional_exclusive_deasserted(&pdev->dev, "tresetn");
> + if (IS_ERR(i3c->tresetn))
> + return dev_err_probe(&pdev->dev, PTR_ERR(i3c->tresetn),
> "Error: missing tresetn ctrl\n");
>
> - reset = devm_reset_control_get_optional_exclusive_deasserted(&pdev->dev, "presetn");
> - if (IS_ERR(reset))
> - return dev_err_probe(&pdev->dev, PTR_ERR(reset),
> + i3c->presetn = devm_reset_control_get_optional_exclusive_deasserted(&pdev->dev, "presetn");
> + if (IS_ERR(i3c->presetn))
> + return dev_err_probe(&pdev->dev, PTR_ERR(i3c->presetn),
> "Error: missing presetn ctrl\n");
>
> spin_lock_init(&i3c->xferqueue.lock);
> --
> 2.43.0
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