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Message-ID: <aV0YIN7OxIElQ5dm@opensource.cirrus.com>
Date: Tue, 6 Jan 2026 14:11:44 +0000
From: Charles Keepax <ckeepax@...nsource.cirrus.com>
To: sebastian.krzyszkowiak@...i.sm
Cc: Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>,
        Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>,
        patches@...nsource.cirrus.com, linux-sound@...r.kernel.org,
        linux-kernel@...r.kernel.org, kernel@...i.sm
Subject: Re: [PATCH RESEND 4/4] ASoC: wm8962: Don't mark
 WM8962_ADDITIONAL_CONTROL_4 as volatile

On Mon, Jan 05, 2026 at 04:02:11AM +0100, Sebastian Krzyszkowiak via B4 Relay wrote:
> From: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@...i.sm>
> 
> Only some bits of that register are actually volatile, so to prevent issues
> with caching let's simply bypass the cache explicitly when we access these
> particular bits.
> 
> This fixes mic-cfg value not being reapplied after runtime resume.
> 
> Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@...i.sm>
> ---
>  sound/soc/codecs/wm8962.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
> index dd73b4dc1b97..22101284c095 100644
> --- a/sound/soc/codecs/wm8962.c
> +++ b/sound/soc/codecs/wm8962.c
> @@ -793,7 +793,6 @@ static bool wm8962_volatile_register(struct device *dev, unsigned int reg)
>  	case WM8962_CLOCKING1:
>  	case WM8962_SOFTWARE_RESET:
>  	case WM8962_THERMAL_SHUTDOWN_STATUS:
> -	case WM8962_ADDITIONAL_CONTROL_4:
>  	case WM8962_DC_SERVO_6:
>  	case WM8962_INTERRUPT_STATUS_1:
>  	case WM8962_INTERRUPT_STATUS_2:
> @@ -3074,7 +3073,9 @@ static void wm8962_mic_work(struct work_struct *work)
>  	int irq_pol = 0;
>  	int reg;
>  
> +	regcache_cache_bypass(wm8962->regmap, true);
>  	reg = snd_soc_component_read(component, WM8962_ADDITIONAL_CONTROL_4);
> +	regcache_cache_bypass(wm8962->regmap, false);

Ah the glory of registers with a mix of configuration and status
bits, love those :-)

Alas I don't think this is safe, the trouble is the cache bypass
applies to the whole register map, so any alsa control write can
slip into the window where you have the cache bypassed and
accidentally be done as a bypassed write.

Fortunately, Richard added a regmap_read_bypassed() fairly recently
which does everything under the regmap lock, so update to use
that and you should be good.

Thanks,
Charles

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