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Message-ID: <176770907988.1004563.13571465521875416136.b4-ty@baylibre.com>
Date: Tue, 6 Jan 2026 15:18:23 +0100
From: Jerome Brunet <jbrunet@...libre.com>
To: linux-amlogic@...ts.infradead.org,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Cc: Jerome Brunet <jbrunet@...libre.com>,
linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
jian.hu@...ogic.com
Subject: Re: [PATCH v1 0/3] clk: meson: small fixes for HDMI PLL OD
Applied to clk-meson (clk-meson-next), thanks!
[1/3] clk: meson: gxbb: Limit the HDMI PLL OD to /4 on GXL/GXM SoCs
https://github.com/BayLibre/clk-meson/commit/5b1a43950fd3
[2/3] clk: meson: g12a: Limit the HDMI PLL OD to /4
https://github.com/BayLibre/clk-meson/commit/7aa6c24697ef
[3/3] clk: meson: gxbb: use the existing HHI_HDMI_PLL_CNTL3 macro
https://github.com/BayLibre/clk-meson/commit/2fe1ef40b58c
Best regards,
--
Jerome
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