linux-kernel - Re: x86/apic: Drop useless row from the TSC deadline errata table

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Message-ID: <68eb4ee9-4851-4e87-ae1f-e527597b8c5b@intel.com>
Date: Tue, 6 Jan 2026 07:16:40 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Andrew Cooper <andrew.cooper3@...rix.com>,
 LKML <linux-kernel@...r.kernel.org>
Cc: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
 Borislav Petkov <bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>,
 x86@...nel.org, "H. Peter Anvin" <hpa@...or.com>,
 Peter Zijlstra <peterz@...radead.org>, Sohil Mehta <sohil.mehta@...el.com>,
 Yuntao Wang <yuntao.wang@...ux.dev>, Zhang Rui <rui.zhang@...el.com>
Subject: Re: x86/apic: Drop useless row from the TSC deadline errata table

On 7/16/25 09:08, Andrew Cooper wrote:
> A microcode revision of 0 is guaranteed to exit
> apic_validate_deadline_timer() early, but a better way is with no
> row at all.
> 
> No functional change.

There's one bit of background that is missing which is that the
steppings are unaffected by the erratum. How about this for a changelog?

The later INTEL_SKYLAKE_X steppings (0x5=>0xf, aka. CXL/CPX) are
unaffected by the TSC deadline erratum. There is an entry in the
deadline_match[] table to reflect this. It puts puts a '0' in the table
to represent that all microcode versions >=0 are unaffected by the erratum.

That entry is unnecessary. The best way to indicate that a CPU is
unaffected is to simply omit it from the table.

Remove the stepping >=0x5 entry from the table.