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Message-ID: <176772046462.510.7125614145328672643.tip-bot2@tip-bot2>
Date: Tue, 06 Jan 2026 17:27:44 -0000
From: "tip-bot2 for Nikolay Borisov" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Nikolay Borisov <nik.borisov@...e.com>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: x86/cpu] x86/tsx: Set default TSX mode to auto
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: f8c7600d468bdb6e44ed3b3247c6e53f5be5d8de
Gitweb: https://git.kernel.org/tip/f8c7600d468bdb6e44ed3b3247c6e53f5be5d8de
Author: Nikolay Borisov <nik.borisov@...e.com>
AuthorDate: Wed, 12 Nov 2025 21:05:48 +02:00
Committer: Dave Hansen <dave.hansen@...ux.intel.com>
CommitterDate: Tue, 06 Jan 2026 09:23:30 -08:00
x86/tsx: Set default TSX mode to auto
At SUSE we've been releasing our kernels with TSX enabled for the past 6
years and some customers have started to rely on it. Furthermore, the last
known vulnerability concerning TSX was TAA (CVE-2019-11135) and a
significant amount time has passed since then without anyone reporting any
issues. Intel has released numerous processors which do not have the
TAA vulnerability (Cooper/Ice Lake, Sapphire/Emerald/Granite Rappids)
yet TSX remains being disabled by default.
The main aim of this patch is to reduce the divergence between SUSE's
configuration and the upstream by switching the default TSX mode to
auto. I believe this strikes the right balance between keeping it
enabled where appropriate (i.e every machine which doesn't contain the
TAA vulnerability) and disabling it preventively.
Signed-off-by: Nikolay Borisov <nik.borisov@...e.com>
Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
Link: https://patch.msgid.link/20251112190548.750746-1-nik.borisov@suse.com
---
arch/x86/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 8052729..f1c98a9 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1816,7 +1816,7 @@ config ARCH_PKEY_BITS
choice
prompt "TSX enable mode"
depends on CPU_SUP_INTEL
- default X86_INTEL_TSX_MODE_OFF
+ default X86_INTEL_TSX_MODE_AUTO
help
Intel's TSX (Transactional Synchronization Extensions) feature
allows to optimize locking protocols through lock elision which
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