linux-kernel - Re: [PATCH V3 3/4] arm64: dts: qcom: hamoa: Add UFS nodes for x1e80100 SoC

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Message-ID: <7gi7sh5psh5v4y5mrbgln6j2cjeu5mogdw2n3a6znjtqyjcyuk@kxpe566v57p3>
Date: Tue, 6 Jan 2026 13:36:06 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>
To: Pradeep P V K <pradeep.pragallapati@....qualcomm.com>
Cc: vkoul@...nel.org, neil.armstrong@...aro.org, robh@...nel.org,
        krzk+dt@...nel.org, conor+dt@...nel.org, martin.petersen@...cle.com,
        andersson@...nel.org, konradybcio@...nel.org,
        taniya.das@....qualcomm.com, dmitry.baryshkov@....qualcomm.com,
        linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-scsi@...r.kernel.org, nitin.rawat@....qualcomm.com,
        Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Abel Vesa <abel.vesa@....qualcomm.com>
Subject: Re: [PATCH V3 3/4] arm64: dts: qcom: hamoa: Add UFS nodes for
 x1e80100 SoC

On Mon, Jan 05, 2026 at 08:16:42PM +0530, Pradeep P V K wrote:
> Add UFS host controller and PHY nodes for x1e80100 SoC.
> 

Minor nits below. With those fixed,

Reviewed-by: Manivannan Sadhasivam <mani@...nel.org>

> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> Reviewed-by: Abel Vesa <abel.vesa@....qualcomm.com>
> Reviewed-by: Taniya Das <taniya.das@....qualcomm.com>
> Signed-off-by: Pradeep P V K <pradeep.pragallapati@....qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/hamoa.dtsi | 123 +++++++++++++++++++++++++++-
>  1 file changed, 120 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
> index f7d71793bc77..33899fa06aa4 100644
> --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
> +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
> @@ -835,9 +835,9 @@ gcc: clock-controller@...000 {
>  				 <0>,
>  				 <0>,
>  				 <0>,
> -				 <0>,
> -				 <0>,
> -				 <0>;
> +				 <&ufs_mem_phy 0>,
> +				 <&ufs_mem_phy 1>,
> +				 <&ufs_mem_phy 2>;
>  
>  			power-domains = <&rpmhpd RPMHPD_CX>;
>  			#clock-cells = <1>;
> @@ -3848,6 +3848,123 @@ pcie4_phy: phy@...e000 {
>  			status = "disabled";
>  		};
>  
> +		ufs_mem_phy: phy@...0000 {
> +			compatible = "qcom,x1e80100-qmp-ufs-phy",
> +				     "qcom,sm8550-qmp-ufs-phy";
> +			reg = <0x0 0x01d80000 0x0 0x2000>;
> +
> +			clocks = <&rpmhcc RPMH_CXO_CLK>,
> +				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
> +				 <&tcsr TCSR_UFS_PHY_CLKREF_EN>;
> +
> +			clock-names = "ref",
> +				      "ref_aux",
> +				      "qref";
> +			resets = <&ufs_mem_hc 0>;
> +			reset-names = "ufsphy";
> +
> +			power-domains = <&gcc GCC_UFS_MEM_PHY_GDSC>;
> +
> +			#clock-cells = <1>;
> +			#phy-cells = <0>;
> +
> +			status = "disabled";
> +		};
> +
> +		ufs_mem_hc: ufs@...4000 {

ufshc@

> +			compatible = "qcom,x1e80100-ufshc",
> +				     "qcom,sm8550-ufshc",
> +				     "qcom,ufshc",
> +				     "jedec,ufs-2.0";

Drop jedec compatible as Qcom UFS controller cannot fallback to generic ufshc
driver.

- Mani

-- 
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