lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20260106092117.3727152-4-joshua.yeong@starfivetech.com>
Date: Tue,  6 Jan 2026 17:21:14 +0800
From: Joshua Yeong <joshua.yeong@...rfivetech.com>
To: rahul@...mations.net,
	anup@...infault.org,
	joshua.yeong@...rfivetech.com,
	leyfoon.tan@...rfivetech.com,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	pjw@...nel.org,
	palmer@...belt.com,
	aou@...s.berkeley.edu,
	alex@...ti.fr,
	rafael@...nel.org,
	viresh.kumar@...aro.org,
	sboyd@...nel.org,
	jms@....tenstorrent.com,
	darshan.prajapati@...fochips.com,
	charlie@...osinc.com,
	dfustini@....tenstorrent.com,
	michal.simek@....com,
	cyy@...self.name,
	jassisinghbrar@...il.com,
	andriy.shevchenko@...ux.intel.com
Cc: linux-riscv@...ts.infradead.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-pm@...r.kernel.org
Subject: [PATCH 3/5] dt-bindings: riscv: cpus: document performance-domains property

The property is defined as a phandle array referencing an RPMI
performance domain provider, with the domain specifier interpreted
according to the bindings of the referenced RPMI performance controller.

Signed-off-by: Joshua Yeong <joshua.yeong@...rfivetech.com>
---
 Documentation/devicetree/bindings/riscv/cpus.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index d733c0bd534f..a7c38d078981 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -143,6 +143,13 @@ properties:
       DMIPS/MHz, relative to highest capacity-dmips-mhz
       in the system.
 
+  performance-domains:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description:
+      A phandle and RPMI performance domain specifier, as defined by the
+      bindings of the referenced RPMI performance controller or provider.
+      (see riscv,rpmi-performance.yaml / riscv,rpmi-mpxy-performance.yaml)
+
 anyOf:
   - required:
       - riscv,isa
-- 
2.43.0


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ