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Message-ID: <aVzWQIOgdtyjom3Y@fedora>
Date: Tue, 6 Jan 2026 10:30:40 +0100
From: Niklas Cassel <cassel@...nel.org>
To: Koichiro Den <den@...inux.co.jp>
Cc: jingoohan1@...il.com, mani@...nel.org, lpieralisi@...nel.org,
	kwilczynski@...nel.org, robh@...nel.org, bhelgaas@...gle.com,
	Frank.Li@....com, linux-pci@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/2] PCI: endpoint: BAR subrange mapping support

On Tue, Jan 06, 2026 at 10:52:54AM +0900, Koichiro Den wrote:
> On Mon, Jan 05, 2026 at 05:55:30PM +0100, Niklas Cassel wrote:
> > 
> > You should also verify that the sum of all the sizes in the pci_epf_bar_submap
> > array adds up to exactly pci_epf_bar->size.
> 
> I didn't think this was a requirement. I experimented with it just now, and
> seems to me that no harm is caused even if the sum of the submap sizes is
> less than the BAR size. Could you point me to any description of this
> requirement in the databook if available?

3.10.7 Inbound Features
"Without address translation, your application address is passed from the
TLPs directly through the application interface."


Thus, when there is not an explicit translation, the DWC controller passes
through a transaction untranslated.

Sure, if there is no physical memory or IO registers at the physical address
corresponding to the PCI address trying to be accessed, no harm done.

But because of the potential security implications, I think it is good to
ensure that the whole PCI address range of the BAR has a physical mapping.


Kind regards,
Niklas

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