linux-kernel - Re: [PATCH v5 0/5] PCI: Add initial support for handling PCIe M.2 connectors in devicetree

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Message-ID: <3jzmxpjz46rx6yfem6govgvahwpxwsqtzxfj5cmkcfmgeubdcb@6oudcjxqsw4h>
Date: Wed, 7 Jan 2026 22:18:29 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Niklas Cassel <cassel@...nel.org>
Cc: manivannan.sadhasivam@....qualcomm.com, 
	Bjorn Helgaas <bhelgaas@...gle.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Bartosz Golaszewski <brgl@...ev.pl>, Damien Le Moal <dlemoal@...nel.org>, 
	Linus Walleij <linus.walleij@...aro.org>, Bartosz Golaszewski <brgl@...nel.org>, 
	linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-arm-msm@...r.kernel.org, Stephan Gerhold <stephan.gerhold@...aro.org>, 
	Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>, linux-pm@...r.kernel.org, linux-ide@...r.kernel.org, 
	Frank Li <Frank.Li@....com>, Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Subject: Re: [PATCH v5 0/5] PCI: Add initial support for handling PCIe M.2
 connectors in devicetree

On Wed, Jan 07, 2026 at 03:36:31PM +0100, Niklas Cassel wrote:
> On Wed, Jan 07, 2026 at 07:41:22PM +0530, Manivannan Sadhasivam via B4 Relay wrote:
> > Hi,
> > 
> > This series is an initial attempt to support the PCIe M.2 connectors in the
> > kernel and devicetree binding. The PCIe M.2 connectors as defined in the PCI
> > Express M.2 Specification are widely used in Notebooks/Tablet form factors (even
> > in PCs). On the ACPI platforms, power to these connectors are mostly handled by
> > the firmware/BIOS and the kernel never bothered to directly power manage them as
> > like other PCIe connectors. But on the devicetree platforms, the kernel needs to
> > power manage these connectors with the help of the devicetree description. But
> > so far, there is no proper representation of the M.2 connectors in devicetree
> > binding. This forced the developers to fake the M.2 connectors as PMU nodes [1]
> > and fixed regulators in devicetree.
> > 
> > So to properly support the M.2 connectors in devicetree platforms, this series
> > introduces the devicetree binding for Mechanical Key M connector as an example
> > and also the corresponding pwrseq driver and PCI changes in kernel to driver the
> > connector.
> > 
> > The Mechanical Key M connector is used to connect SSDs to the host machine over
> > PCIe/SATA interfaces. Due to the hardware constraints, this series only adds
> > support for driving the PCIe interface of the connector in the kernel.
> > 
> > Also, the optional interfaces supported by the Key M connectors are not
> > supported in the driver and left for the future enhancements.
> 
> For me, it is not clear if there is a dependency or conflict with your
> "major pwrctrl rework series":
> [PATCH v4 0/8] PCI/pwrctrl: Major rework to integrate pwrctrl devices with controller drivers
> 
> Does one need to go before the other, or are they completely unrelated
> and can be merged in any order without conflicts?
> 

Only patch 2 has the conflict with pwrctrl rework series, but that is trivial to
fix. Otherwise, both are mostly independent.

- Mani

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