lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20260107194541.1843999-1-dario.binacchi@amarulasolutions.com>
Date: Wed,  7 Jan 2026 20:45:32 +0100
From: Dario Binacchi <dario.binacchi@...rulasolutions.com>
To: linux-kernel@...r.kernel.org
Cc: linux-amarula@...rulasolutions.com,
	Dario Binacchi <dario.binacchi@...rulasolutions.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Conor Dooley <conor+dt@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Rob Herring <robh@...nel.org>,
	Srinivas Kandagatla <srini@...nel.org>,
	devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-stm32@...md-mailman.stormreply.com
Subject: [PATCH 1/2] dt-bindings: nvmem: add STM32 TAMP NVRAM

Add devicetree bindings for TAMP backup registers. These 32-bit
registers are retained in all low-power modes and in VBAT mode. As a
result, they can also be used to store sensitive data because their
content is protected by a tamper detection circuit.

Signed-off-by: Dario Binacchi <dario.binacchi@...rulasolutions.com>
---

 .../bindings/nvmem/st,stm32-tamp-nvram.yaml   | 55 +++++++++++++++++++
 1 file changed, 55 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml

diff --git a/Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml b/Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml
new file mode 100644
index 000000000000..e03469fbe436
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/st,stm32-tamp-nvram.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 TAMP's NVRAM
+
+description: |
+  The TAMP peripheral integrates, amongst others, Non Volatile RAM
+  (NVRAM) with 32/128 32-bit backup registers which can be used by
+  software to store information or communicate with a boot loader.
+
+maintainers:
+  - Dario Binacchi <dario.binacchi@...rulasolutions.com>
+
+allOf:
+  - $ref: nvmem.yaml#
+
+properties:
+  compatible:
+    enum:
+      - st,stm32mp15-tamp-nvram
+      - st,stm32mp25-tamp-nvram
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    nvram: nvram@...10100 {
+        compatible = "st,stm32mp25-tamp-nvram";
+        reg = <0x46010100 0x200>;
+
+        nvmem-layout {
+            compatible = "fixed-layout";
+            #address-cells = <1>;
+            #size-cells = <1>;
+
+            fwu_info: tamp-bkp@c0 {
+                reg = <0xc0 0x4>;
+            };
+
+            boot_mode: tamp-bkp@180 {
+                reg = <0x180 0x4>;
+            };
+        };
+    };
+...
-- 
2.43.0

base-commit: f0b9d8eb98dfee8d00419aa07543bdc2c1a44fb1
branch: stm32-tamp-nvram

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ