linux-kernel - Re: [PATCH] drm/xe: Replace use of system_wq with system_percpu

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CAAofZF5eVkddt0AH1pZJgPmXywOwUitjJ4r7Ftztf3Qm4QbxDg@mail.gmail.com>
Date: Wed, 7 Jan 2026 10:04:29 +0100
From: Marco Crivellari <marco.crivellari@...e.com>
To: Matthew Brost <matthew.brost@...el.com>
Cc: linux-kernel@...r.kernel.org, intel-xe@...ts.freedesktop.org, 
	dri-devel@...ts.freedesktop.org, Tejun Heo <tj@...nel.org>, 
	Lai Jiangshan <jiangshanlai@...il.com>, Frederic Weisbecker <frederic@...nel.org>, 
	Sebastian Andrzej Siewior <bigeasy@...utronix.de>, Michal Hocko <mhocko@...e.com>, 
	Lucas De Marchi <lucas.demarchi@...el.com>, 
	Thomas Hellstrom <thomas.hellstrom@...ux.intel.com>, Rodrigo Vivi <rodrigo.vivi@...el.com>, 
	David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>
Subject: Re: [PATCH] drm/xe: Replace use of system_wq with system_percpu_wq

On Wed, Dec 31, 2025 at 3:25 AM Matthew Brost <matthew.brost@...el.com> wrote:
> What I'd probably do here is store a WQ pointer in 'struct
> xe_tlb_inval' and update all calls in xe_tlb_inval to use that work
> queue.
>
> Since these are tied to a GT currently - see xe_gt_tlb_inval_init_early,
> I'd set the WQ pointer in 'struct xe_tlb_inval' to 'gt->ordered_wq'.
> 'gt->ordered_wq' is the per-GT WQ for resets, jobs timeouts, VF
> migrations (all operations in reclaim path), so this seems to fit here
> as well.

Hi Matthew,

Thanks for your hint, I will send a new version with this change or
if I don't have something properly clear I will get back to you here!

Thanks!

-- 

Marco Crivellari

L3 Support Engineer