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Message-ID: <CAMuHMdUbAU68yuW7aok1WXMzNOVGTZtVJNZQLJyyrbvk976szg@mail.gmail.com>
Date: Wed, 7 Jan 2026 12:17:41 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Biju <biju.das.au@...il.com>
Cc: Michael Turquette <mturquette@...libre.com>, Philipp Zabel <p.zabel@...gutronix.de>,
Stephen Boyd <sboyd@...nel.org>, Biju Das <biju.das.jz@...renesas.com>,
linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 2/2] clk: renesas: rzv2h: Deassert reset on assert timeout
Hi Biju,
On Mon, 8 Dec 2025 at 11:14, Biju <biju.das.au@...il.com> wrote:
> From: Biju Das <biju.das.jz@...renesas.com>
>
> If the assert() fails due to timeout error, set the reset register bit
> back to deasserted state. This change is needed especially for handling
> assert error in suspend() callback that expect the device to be in
> operational state in case of failure.
>
> Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
Thanks for your patch!
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
> --- a/drivers/clk/renesas/rzv2h-cpg.c
> +++ b/drivers/clk/renesas/rzv2h-cpg.c
> @@ -1366,8 +1366,11 @@ static int __rzv2h_cpg_assert(struct reset_controller_dev *rcdev,
>
> ret = readl_poll_timeout_atomic(priv->base + reg, value,
> assert == !!(value & mask), 10, 200);
> - if (ret && !assert) {
> + if (ret) {
> value = mask << 16;
> + if (assert)
> + value |= mask;
> +
Same here: if readl_poll_timeout_atomic() would use its own
variable:
value ^= mask;
> writel(value, priv->base + GET_RST_OFFSET(priv->resets[id].reset_index));
> }
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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