linux-kernel - Re: [PATCH 3/3] arm64: dts: lg: Initial support for LG1215 SoC and reference board

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Message-ID: <260f91bf-c285-4a2f-b4dc-457e7b601761@kernel.org>
Date: Thu, 8 Jan 2026 17:43:38 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Chanho Min <chanho.min@....com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
 Neil Armstrong <neil.armstrong@...aro.org>,
 Kever Yang <kever.yang@...k-chips.com>, Kael D'Alcamo <dev@...l-k.io>,
 Manivannan Sadhasivam <mani@...nel.org>,
 Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: Gunho Lee <gunho.lee@....com>, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 3/3] arm64: dts: lg: Initial support for LG1215 SoC and
 reference board

On 08/01/2026 09:22, Chanho Min wrote:
> +		compatible = "arm,psci";
> +		method = "smc";
> +		cpu_suspend = <0xc4000001>;
> +		cpu_off = <0xc4000002>;
> +		cpu_on = <0xc4000003>;
> +	};
> +
> +	cpu0_opp_table: opp_table@0 {

More warnings...
1. Please follow coding style
2. Please use generic or approved names for this.

> +		compatible = "operating-points-v2";
> +		opp-shared;
> +
> +		opp-default {
> +			opp-hz = /bits/ 64 <1600000000>;
> +		};
> +	};
> +
> +	gic: interrupt-controller@...00000 {

Wrongly placed. All MMIO nodes are part of soc.

> +		compatible = "arm,gic-400";
> +		reg = <0x0 0xc0001000 0x0 0x1000>, /* GICD */
> +		      <0x0 0xc0002000 0x0 0x2000>, /* GICC */
> +		      <0x0 0xc0004000 0x0 0x2000>, /* GICH */
> +		      <0x0 0xc0006000 0x0 0x2000>; /* GICV */
> +		#interrupt-cells = <3>;
> +		#address-cells = <0>;
> +		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0x0f) |
> +					IRQ_TYPE_LEVEL_LOW)>;
> +
> +		interrupt-controller;
> +	};
> +
> +	pmu {
> +		compatible = "arm,armv8-pmuv3";
> +		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-affinity = <&cpu0>,
> +				     <&cpu1>,
> +				     <&cpu2>,
> +				     <&cpu3>;
> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0x0f) |
> +			      IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 14 (GIC_CPU_MASK_RAW(0x0f) |
> +			      IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 11 (GIC_CPU_MASK_RAW(0x0f) |
> +			      IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 10 (GIC_CPU_MASK_RAW(0x0f) |
> +			      IRQ_TYPE_LEVEL_LOW)>;
> +	};
> +
> +	clks {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;

No, this makes no sense, that's not a bus or any sort of device. Drop
entire node.

> +
> +		clk_xtal: clk-xtal {
> +			compatible = "fixed-clock";
> +			clock-output-names = "xtal";
> +			clock-frequency = <50000000>;
> +
> +			#clock-cells = <0>;
> +		};
> +
> +		clk_bus: clk-bus {
> +			compatible = "fixed-factor-clock";
> +			clocks = <&clk_xtal>;
> +			clock-names = "xtal";
> +			clock-output-names = "busclk";
> +			clock-div = <1>;
> +			clock-mult = <4>;
> +
> +			#clock-cells = <0>;
> +		};
> +	};
> +
> +	soc {
> +		compatible = "simple-bus";
> +
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		interrupt-parent = <&gic>;
> +
> +		dwmac_axi_config: dwmac-axi-config {

I don't think this validates.

Also, you really should follow DTS coding style.

> +			snps,rd_osr_lmt = <0x07>;
> +			snps,wr_osr_lmt = <0x07>;
> +			snps,blen = <0 0 16 0 0 0 0>;
> +		};


Best regards,
Krzysztof