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Message-ID: <CAMuHMdWV4uOMnz_FBMW4brWx+6snQ-WOQck5b_YXAxzHhjJgXA@mail.gmail.com>
Date: Thu, 8 Jan 2026 17:51:02 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
Cc: Linus Walleij <linusw@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Magnus Damm <magnus.damm@...il.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>, linux-renesas-soc@...r.kernel.org, 
	linux-gpio@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/8] pinctrl: renesas: rzt2h: allow .get_direction()
 for IRQ function GPIOs

On Fri, 5 Dec 2025 at 16:03, Cosmin Tanislav
<cosmin-gabriel.tanislav.xa@...esas.com> wrote:
> Setting up an IRQ would normally be done in the .activate() and
> .deactivate() ops of the IRQ domain, but for hierarchical IRQ domains
> the .activate() and .deactivate() ops are overridden in the
> gpiochip_hierarchy_setup_domain_ops() function.
>
> As such, activating and deactivating need to be done in the .translate()
> and .free() ops of the IRQ domain.
>
> For RZ/T2H and RZ/N2H, interrupts go through the pin controller, into
> the ICU, which level-translates them and forwards them to the GIC.
>
> To use a GPIO as an interrupt it needs to be put into peripheral
> function mode 0, which will connect it to the IRQ lines of the ICU.
>
> The IRQ chip .child_to_parent_hwirq() callback is called as part of the
> IRQ fwspec parsing logic (as part of irq_create_of_mapping()) which
> happens before the IRQ is requested (as part of gpiochip_lock_as_irq()).
>
> gpiochip_lock_as_irq() calls gpiod_get_direction() if the
> .get_direction() callback is provided to ensure that the GPIO line is
> set up as input.
>
> In our case, IRQ function is separate from GPIO, and both cannot be true
> at the same time.
>
> Return GPIO_LINE_DIRECTION_IN even if pin is in IRQ function to allow
> this setup to work.
>
> Hold the spinlock to ensure atomicity between reading the PMC register
> (which determines whether the pin is in GPIO mode or not) and reading
> the function of the pin when it is not in GPIO mode.
>
> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-pinctrl for v6.20.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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